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參數(shù)資料
| 型號： | ADS7822 |
| 英文描述： | CMOS Dual 4-Input NOR Gate 14-TSSOP -55 to 125 |
| 中文描述： | 12位高速2.7微采樣模擬到數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 146K |
| 代理商： | ADS7822 |
9
ADS7822
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
SMPL
t
CONV
t
CYC
t
CSD
Analog Input Sample Time
1.5
2.0
Clk Cycles
Conversion Time
12
Clk Cycles
Throughput Rate
75
kHz
CS Falling to
DCLOCK LOW
0
ns
t
SUCS
CS Falling to
DCLOCK Rising
30
ns
t
hDO
DCLOCK Falling to
Current D
OUT
Not Valid
DCLOCK Falling to Next
D
OUT
Valid
CS Rising to D
OUT
Tri-State
DCLOCK Falling to D
OUT
Enabled
15
ns
t
dDO
130
200
ns
t
dis
t
en
40
80
ns
75
175
ns
t
f
t
r
D
OUT
Fall Time
D
OUT
Rise Time
90
200
ns
110
200
ns
periods, D
OUT
will output the conversion result, most signifi-
cant bit first. After the least significant bit (B0) has been
output, subsequent clocks will repeat the output data but in a
least significant bit first format.
After the most significant bit (B11) has been repeated, D
OUT
will tri-state. Subsequent clocks will have no effect on the
converter. A new conversion is initiated only when CS has
been taken HIGH and returned LOW.
DATA FORMAT
The output data from the ADS7822 is in straight binary
format as shown in Table II. This table represents the ideal
output code for the given input voltage and does not include
the effects of offset, gain error, or noise.
FIGURE 2. Timing Diagrams and Test Circuits for the Parameters in Table I.
TABLE I. Timing Specifications (V
CC
= 2.7V and above,
–40
°
C to +85
°
C.
A falling CS signal initiates the conversion and data transfer.
The first 1.5 to 2.0 clock periods of the conversion cycle are
used to sample the input signal. After the second falling
DCLOCK edge, D
OUT
is enabled and will output a LOW
value for one clock period. For the next 12 DCLOCK
DESCRIPTION
ANALOG VALUE
Full Scale Range
V
REF
Least Significant
Bit (LSB)
V
REF
/4096
BINARY CODE
HEX CODE
Full Scale
V
REF
–1 LSB
1111 1111 1111
FFF
Midscale
V
REF
/2
1000 0000 0000
800
Midscale – 1 LSB
V
REF
/2 – 1 LSB
0111 1111 1111
7FF
Zero
0V
0000 0000 0000
000
DIGITAL OUTPUT
STRAIGHT BINARY
TABLE II. Ideal Input Voltages and Output Codes.
D
OUT
1.4V
Test Point
3k
100pF
C
LOAD
Load Circuit for t
dDO
, t
r
, and t
f
Voltage Waveforms for D
OUT
Rise and Fall Times, t
r
, t
f
Voltage Waveforms for D
OUT
Delay Times, t
dDO
Voltage Waveforms for t
dis
NOTES: (1) Waveform 1 is for an output with internal conditions such that the output
is HIGH unless disabled by the output control. (2) Waveform 2 is for an output with
internal conditions such that the output is LOW unless disabled by the output control.
Voltage Waveforms for t
en
Load Circuit for t
dis
and t
en
t
r
D
OUT
V
OH
V
OL
t
f
D
OUT
Test Point
t
dis
Waveform 2, t
en
V
CC
t
dis
Waveform 1
100pF
C
LOAD
3k
t
dis
CS/SHDN
D
OUT
Waveform 1
(1)
D
OUT
Waveform 2
(2)
90%
10%
V
IH
1
B11
2
t
en
CS/SHDN
DCLOCK
V
OL
D
OUT
t
dDO
D
OUT
DCLOCK
V
OH
V
OL
V
IL
t
hDO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADS7822B | 12-Bit High Speed 2.7V microPower Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7822C | CMOS Dual 4-Input NOR Gate 14-TSSOP -55 to 125 |
| ADS7822E | CMOS Dual 4-Input NOR Gate 14-TSSOP -55 to 125 |
| ADS7822EB | 12-Bit, High-Speed, 2.7V microPower Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7822EC | CMOS Dual 4-Input NOR Gate 14-CDIP -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7822B | 制造商:BB 制造商全稱:BB 功能描述:12-Bit High Speed 2.7V microPower Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7822C | 制造商:BB 制造商全稱:BB 功能描述:12-Bit High Speed 2.7V microPower Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7822CIDGKRAN | 制造商:Texas Instruments 功能描述: |
| ADS7822E | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-Bit, High-Speed, 2.7V microPower Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7822E/250 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit Hi-Speed 2.7V MicroPower Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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