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參數(shù)資料
| 型號(hào)： | ADS7818E/250G4 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 19/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 12BIT 500KHZ ADC CONV 8-MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Basics |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 500k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 20mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)差分，單極 |
| 配用： | 296-19913-ND - EVAL MOD FOR ADS7818 |
7
ADS7818
FIGURE 1. Basic Operation of the ADS7818.
THEORY OF OPERATION
The ADS7818 is a high speed successive approximation
register (SAR) analog-to-digital converter (A/D) with an
internal 2.5V bandgap reference. The architecture is based
on capacitive redistribution which inherently includes a
sample/hold function. The converter is fabricated on a 0.6
CMOS process. See Figure 1 for the basic operating circuit
for the ADS7818.
The ADS7818 requires an external clock to run the conver-
sion process. This clock can vary between 200kHz (12.5Hz
throughput) and 8MHz (500kHz throughput). The duty cycle
of the clock is unimportant as long as the minimum HIGH
and LOW times are at least 50ns and the clock period is at
least 125ns. The minimum clock frequency is set by the
leakage on the capacitors internal to the ADS7818.
The analog input is provided to two input pins: +IN and –IN.
When a conversion is initiated, the differential input on these
pins is sampled on the internal capacitor array. While a
conversion is in progress, both inputs are disconnected from
any internal function.
The range of the analog input is set by the voltage on the
VREF pin. With the internal 2.5V reference, the input range
is 0 to 5V. An external reference voltage can be placed on
VREF, overdriving the internal voltage. The range for the
external voltage is 2.0V to 2.55V, giving an input voltage
range of 4.0V to 5.1V.
The digital result of the conversion is provided in a serial
manner, synchronous to the CLK input. The result is pro-
vided most significant bit first and represents the result of
the conversion currently in progress—there is no pipeline
delay. By properly controlling the CONV and CLK inputs,
it is possible to obtain the digital result least significant bit
first.
ANALOG INPUT
The +IN and –IN input pins allow for a differential input
signal to be captured on the internal hold capacitor when the
converter enters the hold mode. The voltage range on the
–IN input is limited to –0.2V to 0.2V. Because of this, the
differential input can be used to reject only small signals that
are common to both inputs. Thus, the –IN input is best used
to sense a remote ground point near the source of the +IN
signal. If the source driving the +IN signal is nearby, the
–IN should be connected directly to ground.
The input current into the analog input depends on input
voltage and sample rate. Essentially, the current into the
device must charge the internal hold capacitor during the
sample period. After this capacitance has been fully charged,
there is no further input current. The source of the analog
input voltage must be able to charge the input capacitance to
a 12-bit settling level within the sample period—which can
be as little as 350ns in some operating modes. While the
converter is in the hold mode or after the sampling capacitor
has been fully charged, the input impedance of the analog
input is greater than 1G
.
Care must be taken regarding the input voltage on the +In
and –IN pins. To maintain the linearity of the converter, the
+In input should remain within the range of GND – 200mV
to +VCC + 200mV. The –IN input should not drop below
GND – 200mV or exceed GND + 200mV. Outside of these
ranges, the converter’s linearity may not meet specifications.
REFERENCE
The reference voltage on the VREF pin directly sets the full-
scale range of the analog input. The ADS7818 can operate
with a reference in the range of 2.0V to 2.55V, for a full-
scale range of 4.0V to 5.1V.
The voltage at the VREF pin is internally buffered and this
buffer drives the capacitor DAC portion of the converter.
This is important because the buffer greatly reduces the
dynamic load placed on the reference source. However, the
voltage at VREF will still contain some noise and glitches
from the SAR conversion process. These can be reduced by
carefully bypassing the VREF pin to ground as outlined in the
sections that follow.
INTERNAL REFERENCE
The ADS7818 contains an on-board 2.5V reference, result-
ing in a 0V to 5V input range on the analog input. The
specification table gives the various specifications for the
1
2
3
4
8
7
6
5
+V
CC
CLK
DATA
CONV
V
REF
+In
–In
GND
ADS7818
0.1F
+5V
0.1F
10F
Serial Clock
from
Microcontroller
or DSP
Serial Data
Convert Start
+
2.2F
+
0 to 5V
Analog Input
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7818E2K5 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-Bit High Speed Low Power Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7818E2K5G4 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-Bit High Speed Low Power Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7818EB | 制造商:BB 制造商全稱:BB 功能描述:2SC5161 |
| ADS7818EB/250 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit High Speed Low Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7818EB/250G4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit High Speed Low Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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