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參數(shù)資料
| 型號(hào)： | ADS7808PB |
| 英文描述： | 12-Bit 10ms Serial CMOS Sampling ANALOG-to-DIGITAL CONVERTER |
| 中文描述： | 12位10ms的串行CMOS采樣模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大?。?/td> | 251K |
| 代理商： | ADS7808PB |
ADS7808
4
PIN #
NAME
DESCRIPTION
PIN ASSIGNMENTS
PIN CONFIGURATION
V
DIG
V
ANA
PWRD
BUSY
CS
R/C
TAG
DATA
DATACLK
SYNC
R1
IN
AGND1
R2
IN
R3
IN
CAP
REF
AGND2
SB/BTC
EXT/INT
DGND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
ADS7808
ANALOG
INPUT
RANGE
CONNECT R1
IN
VIA 200
TO
CONNECT R2
IN
VIA 100
TO
CONNECT R3
IN
TO
IMPEDANCE
±
10V
±
5V
±
3.33
0V to 10V
0V to 5V
0V to 4V
V
IN
AGND
V
IN
V
IN
V
AGND
AGND
CAP
CAP
CAP
AGND
V
IN
V
IN
22.9k
13.3k
10.7k
13.3k
10.0k
10.7k
AGND
V
AGND
AGND
V
IN
TABLE I. Input Range Connections. See Figure 4 for
complete information.
1
R1
IN
AGND1
Analog Input. See Table I and Figure 4 for input range connections.
2
Analog Ground. Used internally as ground reference point. Minimal current flow.
3
R2
IN
R3
IN
CAP
Analog Input. See Table I and Figure 4 for input range connections.
4
Analog Input. See Table I and Figure 4 for input range connections.
5
Reference Buffer Capacitor. 2.2
μ
F Tantalum to ground.
Reference Input/Output. Outputs internal 2.5V reference. Can also be driven by external system reference. In both cases,
bypass to ground with a 2.2
μ
F Tantalum capacitor.
Analog Ground.
6
REF
7
AGND2
8
SB/BTC
Select Straight Binary or Binary Two’s Complement data output format. If HIGH, data will be output in a Straight Binary format. If
LOW, data will be output in a Binary Two’s complement format.
9
EXT/INT
Select External or Internal Clock for transmitting data. If HIGH, data will be output synchronized to the clock input on DATACLK. If
LOW, a convert command will initiate the transmission of the data from the previous conversion, along with 12 clock pulses output
on DATACLK.
10
DGND
Digital Ground.
11
SYNC
Synch Output. If EXT/INT is HIGH, either a rising edge on R/C with CS LOW or a falling edge on CS with R/C HIGH will output a
pulse on SYNC synchronized to the external DATACLK.
12
DATACLK
Either an input or an output depending on the EXT/INT level. Output data will be synchronized to this clock. If EXT/INT is LOW,
DATACLK will transmit 12 pulses after each conversion, and then remain LOW between conversions.
13
DATA
Serial Data Output. Data will be synchronized to DATACLK, with the format determined by the level of SB/BTC. In the external clock
mode, after 12-bits of data, the ADS7808 will output the level input on TAG as long as CS is LOW and R/C is HIGH (see Figure 3.) If
EXT/INT is LOW, data will be valid on both the rising and falling edges of DATACLK, and between conversions DATA will stay at the
level of the TAG input when the conversion was started.
14
TAG
Tag Input for use in external clock mode. If EXT/INT is HIGH, digital data input on TAG will be output on DATA with a delay of 12
DATACLK pulses as long as CS is LOW and R/C is HIGH. See Figure 3.
15
R/C
Read/Convert Input. With CS LOW, a falling edge on R/C puts the internal sample/hold into the hold state and starts a conversion.
When EXT/INT is LOW, this also initiates the transmission of the data results from the previous conversion. If EXT/INT is HIGH, a
rising edge on R/C with CS LOW, or a falling edge on CS with R/C HIGH, transmits a pulse on SYNC and initiates the transmission of
data from the previous conversion.
16
CS
Chip Select. Internally OR’ed with R/C.
17
BUSY
Busy Output. Falls when a conversion is started, and remains LOW until the conversion is completed and the data is latched into the
output shift register. CS or R/C must be HIGH when BUSY rises, or another conversion will start without time for signal acquisition.
18
PWRD
Power Down Input. If HIGH, conversions are inhibited and power consumption is significantly reduced. Results from the previous
conversion are maintained in the output shift register.
19
V
ANA
Analog Supply Input. Nominally +5V. Connect directly to pin 20, and decouple to ground with 0.1
μ
F ceramic and 10
μ
F Tantalum
capacitors.
20
V
DIG
Digital Supply Input. Nominally +5V. Connect directly to pin 19. Must be
≤
V
ANA
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7808U | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 10us Serial CMOS Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7808U | 制造商:Texas Instruments 功能描述:IC 12BIT ADC 100KHZ SOIC20 制造商:Texas Instruments 功能描述:IC, 12BIT ADC, 100KHZ, SOIC20 制造商:Texas Instruments 功能描述:IC, 12BIT ADC, 100KHZ, SOIC20; Resolution (Bits):12bit; Sampling Rate:100kSPS; Supply Voltage Type:Single; Supply Voltage Min:4.75V; Supply Voltage Max:5.25V; Supply Current:16mA; Digital IC Case Style:SOIC; No. of Pins:20; Input ;RoHS Compliant: Yes |
| ADS7808U/1K | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 10us Serial CMOS Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7808U/1KE4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 10us Serial CMOS Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7808U/1KG4 | 制造商:Texas Instruments 功能描述: |
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