參數(shù)資料
型號(hào): ADS5421
英文描述: PLUG, PCB, VERTICAL, 20WAY; Connector type:Wire-to-Board; Gender:Plug; Ways, No. of:20; Pitch, lead:1.27mm; Termination method:Solder; Material, contact:Phosphor Bronze; Plating, contact:Gold over Nickel; Rows, No. of:2; Pitch:0.05"; RoHS Compliant: Yes
中文描述: 14位,40MHz的采樣模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 3/21頁
文件大小: 395K
代理商: ADS5421
ADS5421
SBAS237D
3
www.ti.com
DIGITAL INPUTS
Clock Input
Logic Family (other than clock inputs)
High Level Input Current
(5)
(V
= 5V)
Low Level Input Current (V
IN
= 0V)
High Level Input Voltage
Low Level Input Voltage
Input Capacitance
Rising Edge of Convert Clock
+0.5
+V
SD
Vp-p
+3V/+5V Compatible CMOS
100
10
μ
A
μ
A
V
V
pF
+2.0
+1.0
5
DIGITAL OUTPUTS
(6)
Logic Family
Logic Coding
Low Output Voltage (I
OL
= 50
μ
A to 0.5mA)
High Output Voltage (I
OH
= 50
μ
A to 0.5mA)
Low Output Voltage (I
OL
= 50
μ
A to 1.6mA)
High Output Voltage (I
OH
= 50
μ
A to 1.6mA)
3-State Enable Time
3-State Disable Time
Output Capacitance
+3V/+5V Compatible CMOS
Straight Offset Binary
VDRV = 3V
+0.2
V
V
V
V
ns
ns
pF
+2.5
VDRV = 5V
+0.2
+2.5
OE = LOW
OE = HIGH
20
2
5
40
10
ACCURACY
Zero Error (Referred to –FS)
Zero Error Drift (Referred to –FS)
Gain Error
(7)
Gain Error Drift
(7)
Power-Supply Rejection of Gain
Internal REF Tolerance (V
, V
REFB
)
External REF Voltage Range
Reference Input Resistance
at +25
°
C
±
0.5
15
±
0.2
35
68
±
10
2
1.0
±
1.0
%FS
ppm/
°
C
%FS
ppm/
°
C
dB
mV
V
k
at +25
°
C
±
1.0
V
=
±
5%
Deviation from Ideal
±
50
2.025
0.9
POWER-SUPPLY REQUIREMENTS
Supply Voltage: +V
SA
, +V
SD
Supply Current: +I
Output Driver Supply Current (VDRV)
Power Dissipation: VDRV = 5V
Operating, f
IN
= 10MHz
Operating, f
IN
= 10MHz
+4.75
+5.0
170
12
900
850
40
+5.25
V
mA
mA
mW
mW
mW
VDRV = 3V
Power Down
925
Operating
Thermal Resistance,
θ
JA
LQFP-64
48
°
C/W
NOTES: (1) Spurious-Free Dynamic Range refers to the magnitude of the largest harmonic. (2) dBFS means dB relative to Full-Scale. (3) 2-tone intermodulation
distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the 2-tone fundamental envelope.
(4) Effective Number of Bits (ENOB) is defined by (SINAD – 1.76)/6.02. (5) A 50k
pull-down resistor is inserted internally. (6) Recommended maximum
capacitance loading, 15pF. (7) Includes internal reference.
ELECTRICAL CHARACTERISTICS
(Cont.)
T
= specified temperature range, typical at +25
°
C, +V
= +V
SD
= +5V, differential input range = 1.5V to 3.5V each input (4Vp-p), sampling rate = 40MHz, internal
reference, VDRV = +3V, and –1dBFS, unless otherwise noted.
ADS5421Y
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
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