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| 型號(hào)： | ADP5589ACBZ-02-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 35/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PORT EXPANDER 19I/O 25WLSCP |
| 產(chǎn)品變化通告： | 8mm Carrier Tape Changes 28/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 系列： | * |
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ADP5589
Data Sheet
Rev. B | Page 40 of 52
UNLOCK_TIMERS Register 0x36
Table 62. UNLOCK_TIMERS Bit Descriptions
Bits
Name
R/W
Description
[7: 3]
INT_MASK_TIMER[4:0]
R/W
If the keypad is locked and this timer is set, any key event (or GPI/logic event
programmed to FIFO update) is allowed to generate an EVENT_INT interrupt. This timer
then begins counting, and no further events generate an interrupt until this timer has
expired (or both unlock events have occurred).
00000 = disabled.
00001 = 1 sec.
00010 = 2 sec.
11110 = 30 sec.
11111 = 31 sec.
[2: 0]
UNLOCK_TIMER[2:0]
R/W
Defines the time in which the second unlock event must occur after the first unlock
event has occurred. If the second unlock event does not occur within this time (or any
other event occurs), the keypad goes back to full lock mode.
000 = disabled.
001 = 1 sec.
010 = 2 sec.
011 = 3 sec.
100 = 4 sec.
101 = 5 sec.
110 = 6 sec.
111 = 7 sec.
LOCK_CFG Register 0x37
Table 63. LOCK_CFG Bit Descriptions
Bits
Name
R/W
Description
[7:1]
Reserved.
0
LOCK_EN
R/W
Enable the lock function.
RESET1_EVENT_A Register 0x38
Table 64. RESET1_EVENT_A Bit Descriptions
Bits
Name
R/W
Description
7
RESET1_EVENT_A Level
R/W
Defines which level the first reset event should be.
For key events:
0 = not applicable; releases not used for reset generation.
1 = press is used as reset event.
For GPIs and logic outputs configured for FIFO updates:
0 = inactive event used as reset condition.
1 = active event used as reset condition.
[6:0]
RESET1_EVENT_A[6:0]
R/W
Defines an event that can be used to generate the RESET1 signal.
Up to three events can be defined for generating the RESET1 signal, using
RESET1_EVENT_A[6:0], RESET1_EVENT_B[6:0], and RESET1_EVENT_C[6:0].
If one of the registers is 0, that register is not used for reset generation.
All reset events must be detected at the same time to trigger the reset.
RESET1_EVENT_B Register 0x39
Table 65. RESET1_EVENT_B Bit Descriptions
Bits
Name
R/W
Description
7
RESET1_EVENT_B Level
R/W
Defines which level the second reset event should be.
[6: 0]
RESET1_EVENT_B[6:0]
R/W
Defines an event that can be used to generate the RESET1 signal.
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