參數(shù)資料
型號: ADP3421JRU
廠商: ANALOG DEVICES INC
元件分類: 穩(wěn)壓器
英文描述: Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs
中文描述: SWITCHING CONTROLLER, PDSO28
封裝: TSSOP-28
文件頁數(shù): 3/12頁
文件大?。?/td> 146K
代理商: ADP3421JRU
REV. A
–3–
ADP3421
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
CURRENT LIMIT COMPARATOR
Input Offset Voltage
Input Bias Current
Hysteresis Current
V
CLOS
I
CL+
I
CL–
V
CS–
= 1.3 V
V
CS+
= 1.3 V
V
CORE
= V
RAMP
= 1.3 V
V
REG
= 1.28 V, V
CS–
= 1.3 V
V
CS+
= 1.28 V
R
IHYS
Open
R
IHYS
= 170 k
R
IHYS
= 17 k
V
CS+
= 1.32 V
R
IHYS
Open
R
IHYS
= 170 k
R
IHYS
= 17 k
–6
–5
+6
+5
mV
μ
A
–5
–38
–335
μ
A
μ
A
μ
A
–22
–265
–30
–300
–5
–27
–225
1.87
60
100
μ
A
μ
A
μ
A
V
ns
ns
–13
–175
1.53
–20
–200
1.70
30
50
Hysteresis Setting Reference Voltage V
VHYS
Propagation Delay Time
6
t
CLPD7
T
A
= 25
°
C
0
°
C
T
A
100
°
C
LINEAR REGULATOR SOFT-START TIMER
Charge Current
Discharge Current
Enable Threshold
Termination Threshold
I
SSC(UP)
I
SSCEN4
V
V
SSCTH
V
SSC
= 0 V
V
SSC
= 1.7 V, V
UVLO
= 1.1 V
–0.6
0.3
–1.0
1.0
150
1.70
–1.4
μ
A
mA
mV
V
400
1.87
1.53
2.5 V CLK LDO CONTROLLER
Feedback Bias Current
Output Drive Current
I
CLKFB
I
CLKDRV
V
CLKFB
= 2.5 V
V
CLKDRV
= 2.55 V
V
CLKDRV
= 2.45 V
I
CLKDRV
= 1 mA
12.5
25
1
20
μ
A
μ
A
mA
mA/V
3
DC Transconductance
G
CLK
500
1.5 V I/O LDO CONTROLLER
Feedback Bias Current
Output Drive Current
I
IOFB
I
IODRV
V
IOFB
= 1.5 V
V
IODRV
= 1.53 V
V
IODRV
= 1.47 V
I
CLKDRV
= 1 mA
7.5
15
1
60
μ
A
μ
A
mA
mA/V
10
DC Transconductance
G
IO
650
LEVEL TRANSLATOR
Input Clamping Threshold
Output Voltage
V
LTIH
V
LTOH
V
LTOL
t
LTPD
I
LTI
= –10
μ
A
I
LTI
= –10
μ
A
9
V
LTI
= 0.175 V
9
0.95
0.9
×
V
CCLT
1.5
V
CCLT
375
10
V
V
mV
ns
Propagation Delay Time
6
NOTES
1
V
CORE
ramps up monotonically.
2
V
CORE
ramps down monotonically.
3
During latency time of VID code change, the Power Good output signal should not be considered valid.
4
Internal bias and soft start are not enabled unless the soft-start pin voltage first drops below the enable threshold.
5
Measured from 50% of VID code transient amplitude to the point where V
DAC
settles within
±
1% of its steady state value.
6
Guaranteed by characterization.
7
40 mV p-p amplitude impulse with 20 mV overdrive. Measure from the input threshold intercept point to 50% of the output voltage swing.
8
Measured between the 30% and 70% points of the output voltage swing.
9
The LTO output tied to V
CCLT
= 2.5 V rail through an R
LTO
= 150
pull-up resistor.
Specifications subject to change without notice.
相關(guān)PDF資料
PDF描述
ADP3422 Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.35V) 8-TSSOP -40 to 110
ADP3422JRU Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110
ADP3502 CDMA Power Management System
ADP3502ASU CDMA Power Management System
ADP3510 Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADP3421JRU-REEL 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
ADP3421JRU-REEL7 制造商:ON Semiconductor 功能描述:
ADP3422 制造商:AD 制造商全稱:Analog Devices 功能描述:IMVP-II-Compliant Core Power Controller for Mobile CPUs
ADP3422JRU 制造商:AD 制造商全稱:Analog Devices 功能描述:IMVP-II-Compliant Core Power Controller for Mobile CPUs
ADP3422JRU-REEL 制造商:Analog Devices 功能描述: