參數(shù)資料
型號: ADP3408ARU-18
廠商: Analog Devices, Inc.
英文描述: GSM Power Management System
中文描述: 手機電源管理系統(tǒng)
文件頁數(shù): 11/16頁
文件大?。?/td> 206K
代理商: ADP3408ARU-18
REV. 0
ADP3408
–11–
THEORY OF OPERATION
The ADP3408 is a power management chip optimized for use
with GSM baseband chipsets in handset applications. Figure 1
shows a block diagram of the ADP3408.
The ADP3408 contains several blocks:
Six Low Dropout Regulators (SIM, Core, Analog, Crystal
Oscillator, Memory, Real-Time Clock)
Reset Generator
Buffered Precision Reference
Lithium Ion Charge Controller and Processor Interface
Power-On/-Off Logic
Undervoltage Lockout
Deep Discharge Lockout
These functions have traditionally been done either as a discrete
implementation or as a custom ASIC design. The ADP3408
combines the benefits of both worlds by providing an integrated
standard product where every block is optimized to operate in a
GSM environment while maintaining a cost competitive solution.
Figure 3 shows the external circuitry associated with the ADP3408.
Only a minimal number of support components are required.
Input Voltage
The input voltage range of the ADP3408 is 3 V to 5.5 V and is
optimized for a single Li-Ion cell or three NiMH cells. The
thermal impedance of the ADP3408 is 68
°
C/W for four-layer
boards. The end-of-charge voltage for high capacity NiMH cells
can be as high as 5.5 V. Power dissipation should be calculated
at maximum ambient temperatures and battery voltage in order
not to exceed the 125
°
C maximum allowable junction temperature.
Figure 4 shows the maximum power dissipation as a function of
ambient temperature.
However, high battery voltages normally occur only when the
battery is being charged and the handset is not in conversation
mode. In this mode there is a relatively light load on the LDOs.
A fully charged Li-Ion battery is 4.25 V, where the ADP3408
can deliver the maximum power (0.56W) up to 85
°
C ambient
temperature.
AMBIENT TEMPERATURE
C
1.2
0.0
20
100
0
P
20
40
60
80
1.0
0.8
0.6
0.4
0.2
Figure 4. Power Dissipation vs. Temperature
Low Dropout Regulators (LDOs)
The ADP3408 high-performance LDOs are optimized for their
given functions by balancing quiescent current, dropout voltage,
regulation, ripple rejection, and output noise. 2.2
μ
F tantalum
or MLCC ceramic capacitors are recommended for use with the
core, memory, SIM, and analog LDOs. A 0.22
μ
F capacitor is
recommended for the TCXO LDO.
PWRONIN
PWRONKEY
ROWX
SIMEN
VRTCIN
VRTC
BATSNS
MVBAT
CHRDET
CHRIN
GATEIN
GATEDR
DGND
ISENSE
TCXOEN
AGND
REFOUT
VTCXO
VAN
VBAT
VCORE
VMEM
VBAT2
VSIM
RESET
RESCAP
CHGEN
EOC
U1
ADP3408
C1
0.1 F
CAPACITOR
TYPE BACKUP
COIN CELL
C2, 10nF
R1
0.33
Q1
SI3441DY
D1
LI OR NIMH
BATTERY
PWRON
PWRONKEY
KEYPADROW
GPIO
VRTC
AUXADC
GPIO
CHARGER IN
GPIO
C3, 10 F
R2
10
C4
0.1 F
C5
2.2 F
C6
2.2 F
C7
2.2 F
C8
2.2 F
C9
0.22 F
C10
0.1 F
CLKON
REF
VTCXO
VAN
VCORE
VMEM
VSIM
RESET
GPIO
GPIO
Figure 3. Typical Application Circuit
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