參數(shù)資料
型號: ADP3335ARM-3.3-RL
廠商: ANALOG DEVICES INC
元件分類: 固定正電壓單路輸出LDO穩(wěn)壓器
英文描述: 3.3 V FIXED POSITIVE LDO REGULATOR, 0.37 V DROPOUT, PDSO8
封裝: MO-187AA, MSOP-8
文件頁數(shù): 12/16頁
文件大?。?/td> 442K
代理商: ADP3335ARM-3.3-RL
ADP3335
Rev. A | Page 5 of 16
PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
ADP3335
TOP VIEW
(Not to Scale)
OUT
1
OUT
2
OUT
3
GND
4
IN
SD
NR
8
7
6
5
00147-0-022
Figure 3. 8-Lead MSOP
TOP VIEW
(Not to Scale)
ADP3335
OUT 1
OUT 2
OUT 3
GND 4
IN
SD
NR
8
7
6
5
00147-0-025
Figure 4. 8-Lead LFCSP
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Function
1, 2, 3
OUT
Output of the Regulator. Bypass to ground with a 1.0 F or larger capacitor. All pins must be connected together
for proper operation.
4
GND
Ground Pin.
5
NR
Noise Reduction Pin. Used for further reduction of output noise (see the Noise Reduction section for further
details).
6
SD
Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, this
pin should be connected to the input pin.
7, 8
IN
Regulator Input. All pins must be connected together for proper operation.
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