- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374021 > ADP3334 (Analog Devices, Inc.) Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection PDF資料下載
參數(shù)資料
| 型號： | ADP3334 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| 中文描述： | 無電容，NMOS管，150mA的低壓差穩(wěn)壓器的反向電流保護 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 230K |
| 代理商： | ADP3334 |
REV. 0
ADP3334
–7–
In order to have the lowest possible sensitivity of the output
voltage to temperature variations, it is important that the paral-
lel resistance of R1 and R2 is always 50 k
.
R
R
R
R
k
1
1
2
2
50
×
+
=
Also, for the best accuracy over temperature the feedback volt-
age should be set for 1.178 V:
V
V
R
+
R
R
FB
OUT
=
×
2
1
2
where
V
OUT
is the desired output voltage and
V
FB
is the
“
virtual
bandgap
”
voltage. Note that V
FB
does not actually appear at the
FB pin due to loading by the internal PT AT current.
Combining the above equations and solving for R1 and R2 gives
the following formulas:
R
k
V
V
OUT
FB
1
50
=
×
R
k
V
V
FB
OUT
2
50
1
=
T able I. Feedback Resistor Selection
V
OUT
(V
)
1.5
1.8
2.2
2.7
3.3
5
10
R1(1% Resistor) (k
)
R2 (1% Resistor) (k
)
63.4
76.8
93.1
115
140
210
422
232
147
107
88.7
78.7
64.9
56.2
T hermal Overload Protection
T he ADP3334 is protected against damage from excessive power
dissipation by its thermal overload protection circuit which limits
the die temperature to a maximum of 165
°
C. Under extreme
conditions (i.e., high ambient temperature and power dissipation)
where die temperature starts to rise above 165
°
C, the output
current is reduced until the die temperature has dropped to a
safe level. T he output current is restored when the die tempera-
ture is reduced.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures will not exceed 150
°
C.
Calculating Junction T emperature
Device power dissipation is calculated as follows:
P
D
= (
V
IN
–
V
OUT
)
I
LOAD
+ (
V
IN
)
I
GND
Where
I
LOAD
and
I
GND
are load current and ground current,
V
IN
and
V
OUT
are input and output voltages respectively.
Assuming I
LOAD
= 400 mA, I
GND
= 4 mA, V
IN
= 5.0 V and
V
OUT
= 2.8 V, device power dissipation is:
P
D
= (5
–
2.8) 400
mA
+ 5.0 (4
mA
) = 900
mW
T he proprietary package used in the ADP3334 has a thermal
resistance of 86.6
°
C /W, significantly lower than a standard
SOIC-8 package. Assuming a 4-layer board, the junction tem-
perature rise above ambient temperature will be approximately
equal to:
T
W
C W
/
C
A
J
=
×
=
0 900
.
86 6
77 9
.
.
o
o
T o limit the maximum junction temperature to 150
°
C, maxi-
mum allowable ambient temperature will be:
T
AMAX
= 150
°
C
–
77.9
°
C/W
= 72.1
°
C
Printed Circuit Board Layout Consideration
All surface mount packages rely on the traces of the PC board to
conduct heat away from the package.
In standard packages the dominant component of the heat resis-
tance path is the plastic between the die attach pad and the
individual leads. In typical thermally enhanced packages one or
more of the leads are fused to the die attach pad, significantly
decreasing this component. T o make the improvement mean-
ingful, however, a significant copper area on the PCB must be
attached to these fused pins.
T he patented thermal coastline lead frame design of the ADP3334
uniformly minimizes the value of the dominant portion of the
thermal resistance. It ensures that heat is conducted away by all
pins of the package. T his yields a very low 86.6
°
C/W thermal
resistance for an SOIC-8 package, without any special board
layout requirements, relying only on the normal traces connected
to the leads. T his yields a 15% improvement in heat dissipation
capability as compared to a standard SOIC-8 package. T he
thermal resistance can be decreased by, approximately, an addi-
tional 10% by attaching a few square cm of copper area to the
IN or OUT pins of the ADP3334 package.
It is not recommended to use solder mask or silkscreen on the
PCB traces adjacent to the ADP3334
’
s pins since it will increase
the junction-to-ambient thermal resistance of the package.
Shutdown Mode
Applying a T T L high signal to the shutdown (SD) pin or tying
it to the input pin, will turn the output OFF. Pulling SD down
to 0.4 V or below, or tying it to ground will turn the output ON.
In shutdown mode, quiescent current is reduced to much less
than 1
μ
A.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADP3334AR | Replaced by BQ27541 : Single Cell Li-Ion Battery Manager with Impedance Track Fuel Gauge Technology 20-TSSOP -40 to 85 |
| ADP3335ARM-18 | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| ADP3335ARM-25 | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| ADP3335ARM-285 | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| ADP3335ARM-33 | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADP3334ACP | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Accuracy, Low IQ, anyCAP Adjustable Low Dropout Regulator |
| ADP3334ACP-REEL7 | 制造商:Analog Devices 功能描述:LDO Regulator Pos 1.5V to 10V 0.8A 8-Pin LFCSP EP T/R |
| ADP3334ACPZ-REEL7 | 功能描述:IC REG LDO ADJ .5A 8LFCSP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:anyCAP® 標準包裝:75 系列:- 穩(wěn)壓器拓撲結(jié)構(gòu):正，可調(diào)式 輸出電壓:1.2 V ~ 37 V 輸入電壓:4.2 V ~ 40 V 電壓 - 壓降（標準）:- 穩(wěn)壓器數(shù)量:1 電流 - 輸出:500mA 電流 - 限制（最小）:500mA 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-252-3，DPak（2 引線+接片），SC-63 供應商設備封裝:TO-252-3 包裝:管件 產(chǎn)品目錄頁面:1286 (CN2011-ZH PDF) 其它名稱:*LM317AMDT/NOPBLM317AMDT |
| ADP3334ACPZ-REEL7 | 制造商:Analog Devices 功能描述:LDO, ADJ, 1.5V TO 10V, 500mA, LFCSP-8 |
| ADP3334AR | 制造商:Rochester Electronics LLC 功能描述:500 MA ADJUSTABLE ANYCAP LDO - Bulk 制造商:Analog Devices 功能描述:IC VOLTAGE REGULATOR |
發(fā)布緊急采購，3分鐘左右您將得到回復。