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參數(shù)資料
| 型號(hào)： | ADNS-5020-EN |
| 廠(chǎng)商： | Avago Technologies Ltd. |
| 英文描述： | Optical Mouse Sensor |
| 中文描述： | 光學(xué)鼠標(biāo)傳感器 |
| 文件頁(yè)數(shù)： | 9/24頁(yè) |
| 文件大小： | 278K |
| 代理商： | ADNS-5020-EN |
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9
AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, V
DD
= 3.3 V.
Parameter
Symbol
Minimum Typical
Power Down
t
PD
Wake from Power Down
t
WAKEUP
50
Reset Pulse Width
t
RESET
250
Motion Delay after Reset
t
MOT-RST
SDIO Rise Time
t
r-SDIO
150
SDIO Fall Time
t
f-SDIO
150
SDIO delay after SCLK
t
DLY-SDIO
SDIO Hold Time
t
hold-SDIO
0.5
SDIO Setup Time
t
setup-SDIO
120
SPI Time between
t
SWW
30
Write Commands
SPI Time between Write
t
SWR
20
and Read Commands
SPI Time between Read
t
SRW
500
and Subsequent Commands
t
SRR
SPI Read Address-Data Delay
t
SRAD
4
NCS Inactive after Motion Burst t
BEXIT
250
NCS to SCLK Active
t
NCS-SCLK
120
SCLK to NCS Inactive
t
SCLK-NCS
120
(for read operation)
SCLK to NCS Inactive
t
SCLK-NCS
20
(for write operation)
NCS to SDIO High-Z
t
NCS-SDIO
Transient Supply Current
I
DDT
Maximum
50
55
50
300
300
120
1/f
SCLK
500
60
Units
ms
ms
ns
ms
ns
ns
ns
us
ns
μs
μs
ns
μs
ns
ns
ns
us
ns
mA
Notes
From PD (when bit 1 of register 0x0d
is set) to low current
From PD inactive (when NRESET pin is
asserted high or write 0x5a to register
0x3a) to valid motion
Active low.
From NRESET pull high to valid mo
tion, assuming V
DD
and motion is
present.
C
L
= 100pF
C
L
= 100pF
From SCLK falling edge to SDIO data
valid, no load conditions.
Data held until next falling SCLK edge.
From data valid to SCLK rising edge.
From rising SCLK for last bit of the first
data byte, to rising SCLK for last bit of
the second data byte.
From rising SCLK for last bit of the first
data byte, to rising SCLK for last bit of
the second address byte.
From rising SCLK for last bit of the first
data byte, to falling SCLK for the first
bit of the next address.
From rising SCLK for last bit of the
address byte, to falling SCLK for first bit
of data being read.
Minimum NCS inactive time after
motion burst before next SPI usage.
From NCS falling edge to first SCLK
rising edge.
From last SCLK rising edge to NCS
rising edge, for valid SDIO data
transfer.
From last SCLK rising edge to NCS
rising edge, for valid SDIO data transfer.
From NCS rising edge to SDIO high-Z
state.
Max supply current during a V
DD
ramp
from 0 to V
DD
.
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|---|---|
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| ADNS-5090 | 功能描述:光學(xué)導(dǎo)航傳感器 Wireless Optical Sensor RoHS:否 制造商:Avago Technologies 工作電源電壓: 封裝 / 箱體: 最大工作溫度: 最小工作溫度: |
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