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參數(shù)資料
| 型號： | ADN4695EBRZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC M-LVDS TRANSCEIVER |
| 標(biāo)準(zhǔn)包裝： | 56 |
| 系列： | * |
Data Sheet
ADN4690E/ADN4692E/ADN4694E/ADN4695E
Rev. A | Page 15 of 20
GLITCH-FREE POWER-UP/POWER-DOWN
To minimize disruption to the bus when adding nodes, the
M-LVDS outputs of the device are kept glitch-free when the
device is powering up or down. This feature allows insertion
of devices onto a live M-LVDS bus because the bus outputs are
not switched on before the device is fully powered. In addition,
all outputs are placed in a high impedance state when the device is
powered off.
FAULT CONDITIONS
short-circuit current protection that protects the part under fault
conditions in the case of short circuits on the bus. This protection
limits the current in a fault condition to 24 mA at the transmitter
outputs for short-circuit faults between 1 V and +3.4 V. Any
network fault must be cleared to avoid data transmission errors
and to ensure reliable operation of the data network and any
devices that are connected to the network.
RECEIVER INPUT THRESHOLDS/FAIL-SAFE
Two receiver types are available, both of which incorporate
protection against short circuits.
25 mV of hysteresis. This ensures that slow-changing signals or
a loss of input does not result in oscillation of the receiver output.
Type 1 receiver thresholds are ±50 mV; therefore, the state of the
receiver output is indeterminate if the differential between A and
B is about 0 V. This state occurs if the bus is idle (approximately 0 V
on both A and B), with no drivers enabled on the attached nodes.
Type 2 receivers (ADN4694E/ADN4695E) have an open circuit
and bus-idle fail-safe. The input threshold is offset by 100 mV
so that a logic low is present on the receiver output when the
bus is idle or when the receiver inputs are open.
The different receiver thresholds for the two receiver types are
illustrated in Figure 35. See Table 12 and Table 13 for receiver
output states under various conditions.
TYPE 1 RECEIVER
OUTPUT
LOGIC 1
LOGIC 0
D
IFFE
R
E
N
TIA
L
I
NP
UT
V
O
LT
A
G
E
(V
IA
–
V
IB
)[V]
0.25
0.15
0.05
–0.05
–0.15
0
10471-
034
UNDEFINED
TYPE 2 RECEIVER
OUTPUT
LOGIC 1
LOGIC 0
UNDEFINED
Figure 35. Input Threshold Voltages
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| ADN4695EBRZ-RL7 | 功能描述:IC TXRX MLVDS 100MBPS 14SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標(biāo)準(zhǔn)包裝:121 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN（3x3） 包裝:管件 |
| ADN4696E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
| ADN4696EBRZ | 功能描述:IC RCVR LVDS 2CH 8SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標(biāo)準(zhǔn)包裝:1 系列:- 類型:線路收發(fā)器 驅(qū)動器/接收器數(shù):5/3 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:Digi-Reel® 產(chǎn)品目錄頁面:918 (CN2011-ZH PDF) 其它名稱:296-25096-6 |
| ADN4696EBRZ-RL7 | 功能描述:IC TXRX LVDS 2CH 8SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標(biāo)準(zhǔn)包裝:121 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN（3x3） 包裝:管件 |
| ADN4697E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
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