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參數(shù)資料
| 型號： | ADN4690EBRZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/20頁 |
| 文件大小： | 0K |
| 描述： | IC TXRX MLVDS 100MBPS 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | * |
ADN4690E/ADN4692E/ADN4694E/ADN4695E
Data Sheet
Rev. A | Page 14 of 20
THEORY OF OPERATION
transceivers for transmitting and receiving multipoint, low
voltage differential signaling (M-LVDS) at high speed (data
rates up to 100 Mbps). Each device has a differential line driver
and a differential line receiver, allowing each device to send and
receive data.
Multipoint LVDS expands on the established LVDS low voltage
differential signaling method by allowing bidirectional commu-
nication between more than two nodes. Up to 32 nodes can be
connected on an M-LVDS bus.
HALF-DUPLEX/FULL-DUPLEX OPERATION
Half-duplex operation allows a transceiver to transmit or
receive, but not both at the same time. However, with full-
duplex operation, a transceiver can transmit and receive
simultaneously. The ADN4690E/ADN4694E are half-duplex
devices in which the driver and the receiver share differential
bus terminals. The ADN4692E/ADN4695E are full-duplex
devices that have dedicated driver output and receiver input
pins. Figure 36 and Figure 37 show typical half- and full-duplex
bus topologies, respectively, for M-LVDS.
THREE-STATE BUS CONNECTION
The outputs of the device can be placed in a high impedance
state by disabling the driver or receiver. This allows several driver
outputs to be connected to a single M-LVDS bus. Note that, on
each bus line, only one driver can be enabled at a time, but
many receivers can be enabled at the same time.
The driver can be enabled or disabled using the driver enable
pin (DE). DE enables the driver outputs when taken high; when
taken low, DE puts the driver outputs into a high impedance state.
Similarly, an active low receiver enable pin (RE) controls the
receiver. Taking this pin low enables the receiver, whereas taking
it high puts the receiver outputs into a high impedance state.
Truth tables for driver and receiver output states under various
conditions are shown in Table 10, Table 11, Table 12, and
TRUTH TABLES
Table 9. Truth Table Abbreviations
Abbreviation
Description
H
High level
L
Low level
X
Don’t care
I
Indeterminate
Z
High impedance (off)
NC
Disconnected
Driver, Half Duplex (ADN4690E/ADN4694E)
Table 10. Transmitting (see Table 9 for Abbreviations)
Power
Inputs
Outputs
DE
DI
A
B
Yes
H
L
Yes
H
L
H
Yes
H
NC
L
H
Yes
L
X
Z
Yes
NC
X
Z
≤1.5 V
X
Z
Driver, Full Duplex (ADN4692E/ADN4695E)
Table 11. Transmitting (see Table 9 for Abbreviations)
Power
Inputs
Outputs
DE
DI
Y
Z
Yes
H
L
Yes
H
L
H
Yes
H
NC
L
H
Yes
L
X
Z
Yes
NC
X
Z
≤1.5 V
X
Z
Type 1 Receiver (ADN4690E/ADN4692E)
Table 12. Receiving (see Table 9 for Abbreviations)
Power
Inputs
Output
A B
RE
RO
Yes
≥50 mV
L
H
Yes
≤50 mV
L
Yes
50 mV < A B < 50 mV
L
I
Yes
NC
L
I
Yes
X
H
Z
Yes
X
NC
Z
No
X
Z
Type 2 Receiver (ADN4694E/ADN4695E)
Table 13. Receiving (see Table 9 for Abbreviations)
Power
Inputs
Output
A B
RE
RO
Yes
≥150 mV
L
H
Yes
≤50 mV
L
Yes
50 mV < A B < 150 mV
L
I
Yes
NC
L
Yes
X
H
Z
Yes
X
NC
Z
No
X
Z
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADN4691E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
| ADN4691EBRZ | 功能描述:IC M-LVDS TRANSCEIVER RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 產(chǎn)品培訓(xùn)模塊:RS-232 & USB Transceiver 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:296-19849-2 |
| ADN4691EBRZ-RL7 | 功能描述:IC TXRX MLVDS 200MBPS 8SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標(biāo)準(zhǔn)包裝:121 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN（3x3） 包裝:管件 |
| ADN4692E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
| ADN4692EBRZ | 功能描述:IC INTERFACE TXRX RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標(biāo)準(zhǔn)包裝:98 系列:* |
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