參數(shù)資料
型號: ADN4666ARZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 1/12頁
文件大小: 0K
描述: IC RCVR DIFF LVDS QUAD 16-SOIC
標(biāo)準(zhǔn)包裝: 1,000
類型: 線路接收器
驅(qū)動器/接收器數(shù): 0/4
規(guī)程: LVDS
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
3 V, LVDS, Quad CMOS
Differential Line Receiver
ADN4666
Rev. 0
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responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
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Fax: 781.461.3113
2009 Analog Devices, Inc. All rights reserved.
FEATURES
±8 kV ESD IEC 61000-4-2 contact discharge on receiver input pins
400 Mbps (200 MHz) switching rates
100 ps channel-to-channel skew (typical)
100 ps differential skew (typical)
3.3 ns propagation delay (maximum)
3.3 V power supply
High impedance outputs on power-down
Low power design (10 mW quiescent typical)
Interoperable with existing 5 V LVDS drivers
Accepts small swing (350 mV typical) differential
input signal levels
Supports open, short, and terminated input fail-safe
Conforms to TIA/EIA-644 LVDS standard
Industrial operating temperature range of 40°C to +85°C
Available in surface-mount SOIC package and low profile
TSSOP package
APPLICATIONS
Point-to-point data transmission
Multidrop buses
Clock distribution networks
Backplane receivers
FUNCTIONAL BLOCK DIAGRAM
ROUT1
ROUT2
RIN1+
RIN1–
RIN2+
RIN2–
ROUT4
ROUT3
RIN4–
RIN3–
RIN4+
RIN3+
VCC
GND
ADN4666
R1
R4
R2
R3
08
09
7-
00
1
EN
Figure 1.
GENERAL DESCRIPTION
The ADN4666 is a quad-channel, CMOS low voltage differential
signaling (LVDS) line receiver offering data rates of over 400 Mbps
(200 MHz) and ultralow power consumption.
The device accepts low voltage (350 mV typical) differential
input signals and converts them to a single-ended, 3 V TTL/CMOS
logic level.
The ADN4666 also offers active high and active low enable/disable
inputs (EN and EN) that control all four receivers. These inputs
disable the receivers and switch the outputs to a high impedance
state. Consequently, the outputs of one or more ADN4666
devices can be multiplexed together to reduce the quiescent
power consumption to 10 mW typical.
The ADN4666 and its companion driver, the ADN4665, offer
a new solution to high speed, point-to-point data transmission
and offer a low power alternative to emitter-coupled logic (ECL)
or positive emitter-coupled logic (PECL).
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