參數(shù)資料
型號: ADN4661BRZ
廠商: Analog Devices Inc
文件頁數(shù): 2/12頁
文件大?。?/td> 0K
描述: IC DRIVER DIFF LVDS 1CH 8SOIC
標(biāo)準(zhǔn)包裝: 98
類型: 驅(qū)動器
驅(qū)動器/接收器數(shù): 1/0
規(guī)程: LVDS
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
產(chǎn)品目錄頁面: 765 (CN2011-ZH PDF)
ADN4661
Rev. 0 | Page 10 of 12
THEORY OF OPERATION
The ADN4661 is a single line driver for low voltage differential
signaling. It takes a single-ended 3 V logic signal and converts
it to a differential current output. The data can then be trans-
mitted for considerable distances, over media such as a twisted-
pair cable or PCB backplane, to an LVDS receiver, where it
develops a voltage across a terminating resistor, RT. This resistor
is chosen to match the characteristic impedance of the medium,
typically around 100 Ω. The differential voltage is detected by
the receiver and converted back into a single-ended logic signal.
When DIN is high (Logic 1), current flows out of the DOUT+ pin
(current source) through RT and back to the DOUT pin (current
sink). At the receiver, this current develops a positive differential
voltage across RT (with respect to the inverting input) and results
in a Logic 1 at the receiver output. When DIN is low (Logic 0),
DOUT+ sinks current and DOUT sources current. A negative differen-
tial voltage across RT results in a Logic 0 at the receiver output.
The output drive current is between ±2.5 mA and ±4.5 mA
(typically ±3.55 mA), developing between ±250 mV and ±450 mV
across a 100 Ω termination resistor. The received voltage is centered
around the receiver offset of 1.2 V. Therefore, the noninverting
receiver input for Logic 1 is typically (1.2 V + [355 mV/2]) =
1.377 V, and the inverting receiver input is (1.2 V [355 mV/2])
= 1.023 V. For Logic 0, the inverting and noninverting output
voltages are reversed. Note that because the differential voltage
reverses polarity, the peak-to-peak voltage swing across RT is
twice the differential voltage.
Current-mode drivers offer considerable advantages over
voltage mode drivers such as RS-422 drivers. The operating
current remains fairly constant with increased switching
frequency, whereas the current of voltage mode drivers
increases exponentially in most cases. This is caused by the
overlap as internal gates switch between high and low, which
causes currents to flow from the device power supply to ground.
A current-mode device simply reverses a constant current
between its two outputs, with no significant overlap currents.
This is similar to emitter-coupled logic (ECL) and positive
emitter-coupled logic (PECL), but without the high quiescent
current of ECL and PECL.
APPLICATIONS INFORMATION
Figure 21 shows a typical application for point-to-point data
transmission using the ADN4661 as the driver and the LVDS
receiver.
ADN4661
LVDS RECEIVER
0.1F
VCC
+3.3V
10F
TANTALUM
+
0.1F
VCC
+3.3V
DOUT
DIN
DOUT+
DOUT–
DIN+
DIN–
10F
TANTALUM
+
RT 100
GND
07
87
6-
0
21
Figure 21. Typical Application Circuit
相關(guān)PDF資料
PDF描述
VE-J1Z-MX-F4 CONVERTER MOD DC/DC 2V 30W
VE-B5P-MX-F3 CONVERTER MOD DC/DC 13.8V 75W
SF7382-5PG-3ES CONN RCPT 5POS PNL MNT PIN
VE-J1Z-MX-F3 CONVERTER MOD DC/DC 2V 30W
VE-B5P-MX-F2 CONVERTER MOD DC/DC 13.8V 75W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADN4661BRZ 制造商:Analog Devices 功能描述:Transceiver IC
ADN4661BRZ-REEL7 功能描述:IC DRIVER DIFF LVDS 1CH 8SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:121 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS422,RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN(3x3) 包裝:管件
ADN4662 制造商:AD 制造商全稱:Analog Devices 功能描述:LVDS and M-LVDS Circuit Implementation Guide
ADN4662BRZ 功能描述:IC RCVR DIFF LVDS 1CH 8SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:線路收發(fā)器 驅(qū)動器/接收器數(shù):5/3 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:28-SOIC(0.295",7.50mm 寬) 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:Digi-Reel® 產(chǎn)品目錄頁面:918 (CN2011-ZH PDF) 其它名稱:296-25096-6
ADN4662BRZ 制造商:Analog Devices 功能描述:Transceiver IC