參數(shù)資料
型號(hào)： ADN2811
廠商： Analog Devices, Inc.
元件分類： 運(yùn)動(dòng)控制電子
英文描述： OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp
中文描述： OC-48/OC-48 FEC的時(shí)鐘和數(shù)據(jù)恢復(fù)IC，集成了限幅放大器
文件頁數(shù)： 2/16頁
文件大小： 359K
代理商： ADN2811
REV. A
–2–
ADN2811–SPECIFICATIONS
(T
A
= T
MIN
to T
MAX
, VCC = V
MIN
to V
MAX
, V
EE
= 0 V, C
F
= 4.7 F, SLICEP = SLICEN = VCC,
unless otherwise noted.)
Parameter
Conditions
Min
Typ
Max
Unit
QUANTIZER–DC CHARACTERISTICS
Input Voltage Range
Peak-to-Peak Differential Input
Input Common-Mode Level
Differential Input Sensitivity
Input Overdrive
Input Offset
Input rms Noise
@ PIN or NIN, DC-Coupled
0
1.2
2.4
V
V
V
mV p-p
mV p-p
μ
V
μ
V rms
DC-Coupled. (See Figure 22)
PIN–NIN, AC-Coupled
1
, BER = 1 10
–10
Figure 4
0.4
4
2
500
244
10
5
BER = 1
10
–10
QUANTIZER–AC CHARACTERISTICS
Upper –3 dB Bandwidth
Small Signal Gain
S11
Input Resistance
Input Capacitance
Pulsewidth Distortion
2
1.9
54
–15
100
0.65
10
GHz
dB
dB
pF
ps
Differential
@ 2.5 GHz
Differential
QUANTIZER SLICE ADJUSTMENT
Gain
Control Voltage Range
Control Voltage Range
Slice Threshold Offset
SliceP–SliceN = 0.5 V
SliceP–SliceN
@ SliceP or SliceN
0.115
–0.8
1.3
0.200
0.300
+0.8
VCC
V/V
V
V
mV
±
1.0
LEVEL SIGNAL DETECT (SDOUT)
Level Detect Range (See Figure 2)
R
THRESH
= 2 k
R
THRESH
= 20 k
R
THRESH
= 90 k
9.4
2.5
0.7
0.1
5.6
3.9
3.2
13.3
5.3
3.0
0.3
6.6
6.1
6.7
18.0
7.6
5.2
5
7.8
8.5
9.9
mV
mV
mV
μ
s
dB
dB
dB
Response TimeDC-Coupled
Hysteresis (Electrical), PRBS 2
23
R
THRESH
= 2 k
R
THRESH
= 20 k
R
THRESH
= 90 k
LOSS OF LOCK DETECT (LOL)
LOL Response Time
From f
VCO
error > 1000 ppm
60
μ
s
POWER SUPPLY VOLTAGE
3.0
3.3
3.6
V
POWER SUPPLY CURRENT
150
164
215
mA
PHASE-LOCKED LOOP
CHARACTERISTICS
Jitter Transfer BW
Jitter Peaking
Jitter Generation
PIN–NIN = 10 mV p-p
OC-48
OC-48
OC-48, 12 kHz–20 MHz
590
0.025
880
kHz
dB
UI rms
UI p-p
0.003
3
0.09
0.05
Jitter Tolerance
OC-48 (See Figure 9)
600 Hz
6 kHz
100 kHz
1 MHz
92
3
20
3
5.5
1.0
3
UI p-p
UI p-p
UI p-p
UI p-p
相關(guān)PDF資料
PDF描述
ADN2811ACP-CML OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp
ADN2811ACP-CML-RL OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp
ADN2812 Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp
ADN2812ACP Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADN2811ACP-CML 制造商:Analog Devices 功能描述:CDR 2488.32Mbps/2666.06Mbps SONET/SDH 48-Pin LFCSP EP Tray 制造商:Rochester Electronics LLC 功能描述:- Bulk
ADN2811ACP-CML-RL 制造商:Analog Devices 功能描述:CDR 2488.32Mbps/2666.06Mbps SONET/SDH 48-Pin LFCSP EP T/R
ADN2811ACPZ-CML 功能描述:IC CLK/DATA REC W/AMP 48-LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
ADN2811ACPZ-CML-RL 功能描述:IC CLK DATA REC SDH 2.66GHZ 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):上次購買時(shí)間 PLL:是 主要用途:SONET/SDH，STM 輸入:CML 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:是/是 頻率 - 最大值:2.66GHz 電壓 - 電源:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商器件封裝:48-LFCSP（7x7） 標(biāo)準(zhǔn)包裝:1
ADN2812 制造商:AD 制造商全稱:Analog Devices 功能描述:Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp
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