參數(shù)資料
型號(hào)： ADMC401BST
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號(hào)處理
英文描述： Single-Chip, DSP-Based High Performance Motor Controller
中文描述： 24-BIT, 13 MHz, OTHER DSP, PQFP144
封裝： PLASTIC, LQFP-144
文件頁(yè)數(shù)： 4/60頁(yè)
文件大?。?/td> 417K
代理商： ADMC401BST
REV. B
ADMC401
–4–
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Output Voltage Swing . . . . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range (Ambient) . . . . –40
°
C to +85
°
C
Storage Temperature Range . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperature (5 sec) . . . . . . . . . . . . . . . . . . . . . . +280
°
C
*Stresses above those listed under absolute maximum ratings may cause permanent
damage to the device. These are stresses only; functional operation of the device
at these or any other conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADMC401 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Temperature
Range
–40
°
C to +85
°
C
Instruction
Rate
Package
Description
Package
Option
Model
ADMC401BST
ADMC401-ADVEVALKIT
ADMC401-PB
26 MHz
144-Lead Plastic Thin Quad Flatpack (LQFP)
Development Tool Kit
Evaluation/Processor Board
ST-144
Timing Parameters
GENERAL NOTES
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results for
an individual device, the values given in this data sheet reflect
statistical variations and worst cases. Consequently, you cannot
meaningfully add up parameters to derive longer times.
TIMING NOTES
Switching characteristics specify how the processor changes its
signals. You have no control over this timing; it is dependent on
the internal design. Timing requirements apply to signals that
are controlled outside the processor, such as the data input for a
read operation.
Timing requirements guarantee that the processor operates
correctly with another device. Switching characteristics tell you
what the device will do under a given circumstance. Also, use
the switching characteristics to ensure any timing requirement
of a device connected to the processor (such as memory) is
satisfied.
MEMORY REQUIREMENTS
This chart links common memory device specification names
and ADMC401 timing parameters for your convenience.
Common
Memory Device
Specification Name
Parameter
Name
Function
t
ASW
A0–A13,
DMS
,
PMS
Setup before
WR
Low
A0–A13,
DMS
,
PMS
before
WR
Deasserted
A0–A13,
DMS
,
PMS
Hold after
WR
Deasserted
Data Setup before
WR
High Data Setup Time
Data Hold after
WR
High
RD
Low to Data Valid
A0–A13,
DMS
,
PMS
,
BMS
to Data Valid
Address Setup to
Write Start
Address Setup to
Write End
Address Hold Time
t
AW
t
WRA
t
DW
t
DH
t
RDD
t
AA
Data Hold Time
OE
to Data Valid
Address Access Time
相關(guān)PDF資料
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