參數資料
型號: ADM809-5LART-REEL-7
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: Microprocessor Supervisory Circuit
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3
封裝: TO-236AB, SOT-23, 3 PIN
文件頁數: 5/6頁
文件大?。?/td> 96K
代理商: ADM809-5LART-REEL-7
ADM809-5S/L
–5–
REV. 0
INTERFACING TO OTHER DEVICES OUTPUT
The ADM809-5S/L is designed to integrate with as many devices
as possible and therefore has an output dependant on V
CC
.
Because of this design approach, interfacing this device to other
devices is simplified.
ENSURING A VALID RESET OUTPUT DOWN TO V
CC
= 0 V
When V
CC
falls below 0.8 V, ADM809-5S/L’s
RESET
no longer
sinks current. A high impedance CMOS logic input connected
to
RESET
may, therefore, drift to undetermined logic levels. To
eliminate this problem a 100 k
resistor should be connected
from
RESET
to ground.
V
CC
V
CC
GND
RESET
ADM809-5S/L
100k
Figure 3. Ensuring a Valid
RESET
Output Down to
V
CC
= 0 V
THE BENEFITS OF A VERY ACCURATE
RESET
THRESHOLD
In other microprocessor supervisory circuits, tolerances in supply
voltages lead to an overall increase in
RESET
tolerance levels
due to the deterioration of the microprocessor
RESET
circuit’s
power supply. The possibility of a malfunction during a power
failure is greatly reduced because the ADM809-5S/L series can
operate effectively even when there are large degradations of the
supply voltages. Another advantage of the ADM809-5S/L series
is its very accurate internal voltage reference circuit. These
benefits combine to produce an exceptionally reliable Voltage
Monitor Circuit.
INTERFACING TO MICROPROCESSORS WITH
MULTIPLE INTERRUPTS
In a number of cases it is necessary to interface many interrupts
from different devices (i.e., thermal, attitude, and velocity sen-
sors). The ADM809-5S/L can easily be integrated into existing
interrupt-handling circuits (Figure 6) or used as a stand-alone
device.
PRIORITY ENCODER
74LS147
4 LINE BCD
TO μP
V
CC
ADM809
GND
RESET
OTHER SENSING
DEVICES
V
CC
Figure 4. Interfacing to
μ
Ps with Multiple Interrupts
47k
47k
100nF
3.3V
V
CC
GND
RESET
ADM809-5S/L
Figure 5. Alternative Application Circuit with Extra
Decoupling
22k
100nF
3.3V
V
CC
GND
RESET
ADM809-5S/L
Figure 6. Additional Decoupling Can Be Achieved
Using a 100 nF Capacitor Between V
CC
and Ground
相關PDF資料
PDF描述
ADM809-5LART Microprocessor Supervisory Circuit
ADM809-5LART-REEL Microprocessor Supervisory Circuit
ADM809-5L Microprocessor Supervisory Circuit
ADM809-5S Microprocessor Supervisory Circuit
ADM809-5SCHIPS SRAM Nonvolatile Controller IC for 4 SRAM Banks 16-PDIP 0 to 70
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