參數(shù)資料
型號: ADM488ABRZ
廠商: Analog Devices Inc
文件頁數(shù): 3/16頁
文件大小: 0K
描述: IC TXRX RS485/422 DIFF SGL 8SOIC
標準包裝: 98
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: RS422,RS485
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
ADM488A/ADM489A
Rev. A | Page 11 of 16
THEORY OF OPERATION
The ADM488A/ADM489A are ruggedized RS-485 transceivers
that operate from a single 5 V supply. They contain protection
against radiated and conducted interference and are ideally suited
for operation in electrically harsh environments or where cables
can be plugged/unplugged. They are also immune to high RF
field strengths without special shielding precautions.
The ADM488A/ADM489A are intended for balanced data
transmission and comply with both EIA RS-485 and RS-422
standards. They contain a differential line driver and a differen-
tial line receiver, and are suitable for full-duplex data transmission.
The input impedance on the ADM488A/ADM489A is 12 k,
allowing up to 32 transceivers on the differential bus. The
ADM488A/ADM489A operate from a single 5 V ± 10% power
supply. A thermal shutdown circuit prevents excessive power
dissipation caused by bus contention or by output shorting.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM488A/ADM489A can transmit at data rates up to
250 kbps. Figure 20 shows a typical application for the
ADM488A/ADM489A, a full-duplex link where data transfers
at rates of up to 250 kbps. A terminating resistor is shown at
both ends of the link. This termination is not critical because
the slew rate is controlled by the ADM488A/ADM489A and
reflections are minimized.
The communications network can be extended to include
multipoint connections, as shown in Figure 22. As many as
32 transceivers can be connected to the bus.
Table 6 and Table 7 show the truth tables for transmitting and
receiving.
Table 6. Transmitting Truth Table
Inputs
Outputs
RE
DE
DI
Z
Y
1
0
1
1
0
1
0
High-Z
1
0
Hgh-Z
High-Z
1
X is don’t care.
Table 7. Receiving Truth Table
Inputs
Output
RE
DE
A to B
RO
0
≥ +0.2 V
1
0
0.2 V
0
Inputs open circuit
1
0
High-Z
1
X is don’t care.
08498-
021
R
D
RO
DI
ADM488A
A
B
Z
Y
R
D
RO
DI
ADM488A
A
B
Z
Y
NOTES
1. MAXIMUM NUMBER OF NODES = 32.
RT
VCC
GND
RT
VCC
Figure 20. ADM488A/ADM489A Full-Duplex Data Link
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