V
參數(shù)資料
型號(hào): ADM487EWARZ-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 3/16頁(yè)
文件大?。?/td> 0K
描述: IC TXRX HALF DUP RS485/422 8SOIC
標(biāo)準(zhǔn)包裝: 1,000
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: RS422,RS485
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
ADM485E/ADM487E/ADM1487E
Rev. B | Page 11 of 16
TEST CIRCUITS AND SWITCHING CHARACTERISTICS
0
63
56-
0
03
Z
Y
VOD
VOC
RL
Figure 18. Driver DC Test Load
06
35
6-
0
04
DI
DE
VDD
A
B
RL
CL1
CL2
VOD
Figure 19. Driver Timing Test Circuit
5V
1.5V
1/2VO
20%
80%
20%
DI
A
B
0V
VO
–VO
VDIFF
tSKEW = tDPLH – tDPHL
VDIFF = V (A) – V (B)
tDR
tDPLH
tDPHL
tDF
1/2VO
06
35
6-
0
5
Figure 20. Driver Propagation Delays
GENERATOR
0V OR 5V
50
RL = 500
OUT
CL
S1
1.5V
5V
0V
VOH
0V
0.5V
2.3V
OUT
DE
tDHZ
tDZH,
tDZH(SHDN)
06
35
6-
0
06
D
Figure 21. Driver Enable and Disable Times (tDHZ, tDZH, tDZH(SHDN))
GENERATOR
0V OR 5V
50
D
RL = 500
VCC
OUT
CL
S1
VCC/2
5V
0V
0.5V
2.3V
VOL
OUT
VCC
DE
tDLZ
tDZL,
tDZL(SHDN)
06
35
6-
00
7
Figure 22. Driver Enable and Disable Times (tDZL, tDLZ, tDZL(SHDN))
ATE
B
RECEIVER
OUTPUT
A
R
VID
06
35
6-
00
8
Figure 23. Receiver Propagation Delay Test Circuit
THE RISE TIME AND FALL TIME OF INPUT A AND INPUT B < 4ns
+1V
–1V
tRPHL
tRPLH
1.5V
B
RO
VOH
VOL
A
063
56
-00
9
Figure 24. Receiver Propagation Delays
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