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參數(shù)資料
| 型號： | ADM1181AARW-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | EMI/EMC-Compliant, +-15 kV, ESD-Protected RS-232 Line Drivers/Receivers |
| 中文描述： | DUAL LINE TRANSCEIVER, PDSO16 |
| 封裝： | MS-013AA, SOIC-16 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大小： | 244K |
| 代理商： | ADM1181AARW-REEL |
ADM202E/ADM1181A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. C | Page 5 of 16
14
13
12
11
16
15
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
C1+
R1
IN
T1
OUT
GND
V
CC
V+
C1–
C2+
T2
IN
T1
IN
R1
OUT
C2–
V–
T2
OUT
R2
IN
R2
OUT
ADM202E
ADM1181A
0
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
16
V
CC
2
V+
6
V
15
GND
1, 3
C1+, C1
Description
Power Supply Input: 5 V ± 10%.
Internally Generated Positive Supply (+9 V nominal).
Internally Generated Negative Supply (9 V nominal).
Ground Pin. Must be connected to 0 V.
External Capacitor 1 is connected between these pins. A 0.1 μF capacitor is recommended, but larger
capacitors of up to 47 μF can be used.
External Capacitor 2 is connected between these pins. A 0.1 μF capacitor is recommended, but larger
capacitors of up to 47 μF can be used.
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels.
Transmitter (Driver) Outputs. These are RS-232 signal levels (typically ±9 V).
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 k pull-down resistor to GND is
connected on each input.
Receiver Outputs. These are CMOS output logic levels.
4, 5
C2+, C2
10, 11
7, 14
8, 13
T
IN
T
OUT
R
IN
9, 12
R
OUT
*
INTERNAL 5k
PULL-DOWN RESISTOR ON EACH RS-232 INPUT
C1+
C1–
C2+
C2–
V
CC
V+
10V
10V
V–
+5V TO +10V
VOLTAGE
DOUBLER
5V INPUT
C3
0.1
μ
F
6.3V
+10V TO –10V
VOLTAGE
INVERTER
C4
0.1
μ
F
10V
T1
OUT
T1
IN
C5
0.1
μ
F
T2
OUT
T2
IN
ADM202E
R1
OUT
R2
OUT
R1
IN
R2
IN
CMOS
INPUTS
CMOS
OUTPUTS
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS
*
GND
T1
T2
R1
R2
0.1
μ
F
0.1
μ
F
13
1
3
4
5
11
10
12
9
15
8
7
14
6
2
16
0
Figure 4. ADM202E Typical Operating Circuit
*
INTERNAL 5k
PULL-DOWN RESISTOR ON EACH RS-232 INPUT
C1+
C1–
C2+
C2–
V
CC
V+
0.1
μ
F
10V
10V
V–
+5V TO +10V
VOLTAGE
DOUBLER
5V INPUT
C3
0.1
μ
F
10V
+10V TO –10V
VOLTAGE
INVERTER
C4
0.1
μ
F
10V
T1
OUT
T1
IN
C5
0.1
μ
F
10V
T2
OUT
T2
IN
ADM1181A
R1
OUT
R2
OUT
R1
IN
R2
IN
CMOS
INPUTS
CMOS
OUTPUTS
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS
*
GND
T1
T2
R1
R2
0.1
μ
F
13
1
3
4
5
11
10
12
9
15
8
7
14
6
2
16
0
Figure 5. ADM1181A Typical Operating Circuit
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