參數(shù)資料
型號: ADM1069AST-REEL7
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP32
封裝: MS-026-BBA, LQFP-32
文件頁數(shù): 8/36頁
文件大?。?/td> 763K
代理商: ADM1069AST-REEL7
ADM1069
Rev. A | Page 16 of 36
OUTPUTS
SUPPLY SEQUENCING THROUGH
CONFIGURABLE OUTPUT DRIVERS
Supply sequencing is achieved with the ADM1069 using the
programmable driver outputs (PDOs) on the device as control
signals for supplies. The output drivers can be used as logic
enables or as FET drivers.
The sequence in which the PDOs are asserted (and, therefore,
the supplies are turned on) is controlled by the sequencing
engine (SE). The SE determines what action is to be taken with
the PDOs based on the condition of the ADM1069 inputs.
Therefore, the PDOs can be set up to assert when the SFDs are
in tolerance, the correct input signals are received on the VXn
digital pins, no warnings are received from any of the inputs of
the device, and other options. The PDOs can be used for a
variety of functions. The primary function is to provide enable
signals for LDOs or dc-to-dc converters, which generate
supplies locally on a board. The PDOs can also be used to provide
a POWER_GOOD signal when all the SFDs are in tolerance, or
a RESET output if one of the SFDs goes out of specification
(this can be used as a status signal for a DSP, FPGA, or other
microcontroller).
The PDOs can be programmed to pull up to a number of
different options. The outputs can be programmed as follows:
Open-drain (allowing the user to connect an external pull-
up resistor).
Open-drain with weak pull-up to VDD.
Open-drain with strong pull-up to VDD.
Open-drain with weak pull-up to VPn.
Open-drain with strong pull-up to VPn.
Strong pull-down to GND.
Internally charge-pumped high drive
(12 V, PDO1 to PDO6 only).
The last option (available only on PDO1 to PDO6) allows the
user to directly drive a voltage high enough to fully enhance an
external N-FET, which is used to isolate, for example, a card-
side voltage from a backplane supply (a PDO can sustain greater
than 10.5 V into a 1 μA load). The pull-down switches can also
be used to drive status LEDs directly.
The data driving each of the PDOs can come from one of
three sources. The source can be enabled in the PDOnCFG
configuration register (see the AN-721 Application Note for
details).
The data sources are as follows:
Output from the SE.
Directly from the SMBus. A PDO can be configured so the
SMBus has direct control over it. This enables software
control of the PDOs. Therefore, a microcontroller can be
used to initiate a software power-up/power-down
sequence.
On-Chip Clock. A 100 kHz clock is generated on the
device. This clock can be made available on any of the
PDOs. It can be used, for example, to clock an external
device such as an LED.
04
73
5-
02
8
PDO
SE DATA
CFG4 CFG5 CFG6
SMBus DATA
CLK DATA
10
20k
10
20k
VP1
SEL
VP4
10
20k
VDD
VFET (PDO1 TO PDO6 ONLY)
20
k
Figure 24. Programmable Driver Output
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