參數資料
型號: ADM1067
廠商: Analog Devices, Inc.
英文描述: Super Sequencer with Open-Loop Margining DACs
中文描述: 超音序器的開環(huán)裕數模轉換器
文件頁數: 1/32頁
文件大?。?/td> 474K
代理商: ADM1067
Super Sequencer
with
Open-Loop Margining DACs
ADM1067
FEATURES
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
www.analog.com
Complete supervisory and sequencing solution for up to
10 supplies
10 supply fault detectors enable supervision of supplies to
<0.5% accuracy at all voltages at 25°C
<1.0 % accuracy across all voltages and temperatures
5 selectable input attenuators allow supervision
Supplies up to 14.4 V on VH
Supplies up to 6 V on VPn (VP1 to VP4)
5 dual-function inputs, VXn (VX1 to VX5)
High impedance input to supply fault detector with
thresholds between 0.573 V and 1.375 V
General-purpose logic input
10 programmable output drivers (PDO1 to PDO10)
Open collector with external pull-up
Push/pull output, driven to VDDCAP or VPn
Open collector with weak pull-up to VDDCAP or VPn
Internally charge-pumped high drive for use with external
N-FET (PDO1 to PDO6 only)
Sequencing engine (SE) implements state machine control of
PDO outputs
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
Open-loop margining solution for 6 voltage rails
6 voltage output 8-bit DACs (0.300 V to 1.551 V) allow
voltage adjustment via dc-to-dc converter trim/feedback
node
Device powered by the highest of VPn, VH for improved
redundancy
User EEPROM: 256 bytes
Industry-standard 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPn = 1.2 V
Available in 2 packages
40-lead, 6 mm × 6 mm LFCSP
48-lead, 7 mm × 7 mm TQFP
For more information about the ADM1067 register map,
refer to the
AN-698 Application Note
.
FUNCTIONAL BLOCK DIAGRAM
0
PDO7
PDO8
PDO9
PDO10
GND
VCCP
VX1
VX2
VX3
VX4
VX5
VP1
VP2
VP3
VP4
VH
SFDGND
VDD
ARBITRATOR
VDDCAP
PROGRAMMABLE
RESET
GENERATORS
(SFDs)
FINPUTS
(LOGIOR
SFDs)
SEQUENCING
ENGINE
CONFIGURABLE
OUTPUT
DRIVERS
(HV CAPABLE
OF DRIVING
GATES OF
N-CHANNEL FET)
CONFIGURABLE
OUTPUT
DRIVERS
(LV CAPABLE
OF DRIVING
LOGIC SIGNALS)
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
SDA SCL
A1
A0
SMBus
INTERFACE
EEPROM
ADM1067
REFOUT REFGND
VREF
DAC1
V
DAC
DAC2
V
DAC
DAC3
Figure 1.
V
DAC
DAC4
V
DAC
DAC5
V
DAC
DAC6
V
DAC
MDN
MUP
APPLICATIONS
Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
GENERAL DESCRIPTION
The ADM1067 is a configurable supervisory/sequencing device
that offers a single-chip solution for supply monitoring and
sequencing in multiple supply systems. In addition to these
functions, the ADM1067 integrates six 8-bit voltage output
DACs. These circuits can be used to implement an open-loop
margining system, which enables supply adjustment by altering
either the feedback node or reference of a dc-to-dc converter
using the DAC outputs.
(continued on Page 3)
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