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參數(shù)資料
| 型號(hào)： | ADM1033ARQ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | Thermal Monitor and Fan Speed (RPM) Controller |
| 中文描述： | DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 2Cel, RECTANGULAR, SURFACE MOUNT |
| 封裝： | MO-137AB, QSOP-16 |
| 文件頁數(shù)： | 20/40頁 |
| 文件大?。?/td> | 1164K |
| 代理商： | ADM1033ARQ-REEL |
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ADM1033
LIMITS, STATUS REGISTERS, AND INTERRUPTS
High and low limits are associated with each measurement
channel on the ADM1033 and form the basis of system status
monitoring. The user can set a status bit for any out-of-limit
condition and detect it by polling the device. Alternatively,
SMBusALERTs can be generated to flag a processor or
microcontroller of an out-of-limit condition.
Rev. 0 | Page 20 of 40
8-BIT LIMITS
Table 14 and Table 15 list all the 8-bit limits on the ADM1033:
Table 14. Temperature Limit Registers
Register
Description
0x0B
Local High Limit
0x0C
Local Low Limit
0x0D
Local THERM Limit
0x0E
Remote High Limit
0x0F
Remote Low Limit
0x10
Remote THERM Limit
Default
0x8B (75°C)
0x54 (20°C)
0x95 (85°C)
0x8B (75°C)
0x54 (20°C)
0x95 (85°C)
Table 15. THERM Limit Register
Register
Description
0x19
THERM % Limit
OUT-OF-LIMIT COMPARISONS
The ADM1033 measures all parameters in a round-robin
format and sets the appropriate status bit for out-of limit
conditions. Comparisons are made differently, depending on
whether the measured value is compared to a high or low limit.
Default
0xFF
High Limit
: ≥
Comparison Performed
Low Limit
: <
Comparison Performed
ANALOG MONITORING CYCLE TIME
The analog monitoring cycle time begins on power-up or, if
monitoring has been disabled, by writing a 1 to the monitor/
STBY bit of Configuration Register 1 (Address 0x01). The
ADC measures each one of the analog inputs in turn; as each
measurement is completed, the result is automatically stored in
the appropriate value register. The round-robin monitoring
cycle continues, unless it is disabled. To disable the cycle, write
a 0 to the monitor/STBY bit (Bit 0) of Configuration Register 1
(Address 0x01).
The ADC performs round-robin conversions and takes 11 ms
for the local temperature measurement and 32 ms for each
remote temperature measurement with averaging enabled.
The total monitoring cycle time for the average temperatures is,
therefore, nominally
32 + 11 = 43 ms
Once the conversion time elapses, the round robin starts again.
For more information, refer to the Conversion Rate Register
section.
Fan TACH measurements take place in parallel and are not
synchronized with the temperature measurements.
STATUS REGISTERS
The results of limit comparisons are stored in the status
registers. A 1 represents an out-of-limit measurement; a 0
represents an in-limit measurement. The status registers are
located at Addresses 0x4F to 0x51.
If the measurement is outside its limits, the corresponding
status register bit is set to 1. It remains set at 1 until the
measurement falls back within its limits and either the status
register is read or an ARA is completed.
To poll the state of the various measurements, read the status
registers over the serial bus. If Bit 0 (ALERT low) of Status
Register 3 (Address 0x51) is set, this means the ADM1033 has
pulled the ALERT output low.
Pin 14 is an SMBusALERT output. This pin automatically
notifies the system supervisor of an out-of-limit condition.
Reading the status register clears the status bit, as long as the
error condition has been cleared.
Pin 3 is an ALERT Comp output. This pin asserts low when
ever an unmasked measurement goes outside its limit. Unlike
SMBusALERT, it automatically resets once the measurement
falls back within the programmed limits.
Status register bits are sticky. Whenever a status bit is set due to
an out-of-limit condition, it remains set—even after the trigger-
ing event has cleared. The only way to clear the status bit is to
read the status register (after the triggering event has cleared).
Interrupt mask registers (Reg. 0x08, Reg. 0x09, Reg. 0x0A) allow
individual interrupt sources to be masked from causing an
ALERT. If one of these masked interrupt sources goes out of
limit, its associated status bit is set in the status register.
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