參數(shù)資料
型號: ADM1026JST
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: Circular Connector; No. of Contacts:28; Series:LJT06R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:19; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:19-28
中文描述: 4-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026BBC, LQFP-48
文件頁數(shù): 50/56頁
文件大?。?/td> 634K
代理商: ADM1026JST
ADM1026
Table 83. Register 46h, +12 V High Limit (Power-On Default FFh)
Bit
Name
7–0
+12 V High Limit
Rev. A | Page 50 of 56
R/W
R/W
Description
This register contains the high limit of the +12 V analog input channel.
Table 84. Register 47h, 12 V High Limit (Power-On Default FFh)
Bit
Name
7–0
12V High Limit
R/W
R/W
Description
This register contains the high limit of the
12 V analog input channel.
Table 85. Register 48h, Ext1 Low Limit (Power-On Default 80h)
Bit
Name
7–0
Ext1 Low Limit
R/W
R/W
Description
This register contains the low limit of the Ext1 Temp channel.
Table 86. Register 49h, Ext2 / A
IN9
Low Limit (Power-On-Default 80h)
Bit
Name
7–0
Ext2 Temp /A
IN9
Low
Limit
R/W
R/W
Description
This register contains the low limit of the Ext2 Temp/A
IN9
channel depending on which bit is
configured.
Table 87. Register 4Ah, 3.3 V STBY Low Limit (Power-On Default 00h)
Bit
Name
R/W
7–0
3.3 V STBY Low Limit
R/W
Description
This register contains the low limit of the 3.3 V STBY analog input channel.
Table 88. Register 4Bh, 3.3 V MAIN Low Limit (Power-On Default 00h)
Bit
Name
R/W
7–0
3.3 V MAIN Low Limit
R/W
Description
This register contains the low limit of the 3.3 V MAIN analog input channel.
Table 89. Register 4Ch, +5V Low Limit (Power-On Default 00h)
Bit
Name
7–0
0+5 V Low Limit
R/W
R/W
Description
This register contains the low limit of the +5 V analog input channel.
Table 90. Register 4Dh, V
CCP
Low Limit (Power-On Default 00h)
Bit
Name
7–0
V
CCP
Low Limit
R/W
R/W
Description
This register contains the low limit of the V
CCP
analog input channel.
Table 91. Register 4Eh, +12V Low Limit (Power-On Default 00h)
Bit
Name
7–0
+12 V Low Limit
R/W
R/W
Description
This register contains the low limit of the +12 V analog input channel.
Table 92. Register 4Fh, –12V Low Limit (Power-On Default 00h)
Bit
Name
7–0
12 V Low Limit
R/W
R/W
Description
This register contains the low limit of the
12 V analog input channel.
Table 93. Register 50h, A
IN0
High Limit (Power-On Default FFh)
Bit
Name
7–0
A
IN0
High Limit
R/W
R/W
Description
This register contains the high limit of the A
IN0
analog input channel.
Table 94. Register 51h, A
IN1
High Limit (Power-On Default FFh)
Bit
Name
7–0
A
IN1
High Limit
R/W
R/W
Description
This register contains the high limit of the A
IN1
analog input channel.
Table 95. Register 52h, A
IN2
High Limit (Power-On Default FFh)
Bit
Name
7–0
A
IN2
High Limit
R/W
R/W
Description
This register contains the high limit of the A
IN2
analog input channel.
Table 96. Register 53h, A
IN3
High Limit (Power-On Default FFh)
Bit
Name
7–0
A
IN3
High Limit
R/W
R/W
Description
This register contains the high limit of the A
IN3
analog input channel.
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