參數(shù)資料
型號: ADM1024ARUZ-R7
廠商: ON Semiconductor
文件頁數(shù): 20/30頁
文件大?。?/td> 0K
描述: IC MONITOR SYS TEMP/VOLT 24TSSOP
產(chǎn)品變化通告: MFG CHG Notification ADI to ON Semi
Product Discontinuation 30/Sept/2011
標(biāo)準(zhǔn)包裝: 1,000
應(yīng)用: PC,PDA
接口: 串行
電源電壓: 2.8 V ~ 5.5 V
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
ADM1024
http://onsemi.com
27
Table 13. REGISTER 40H, CONFIGURATION REGISTER 1 (POWER-ON DEFAULT, 08H)
Bit
Name
R/W
Description
0
START
R/W
Logic 1 enables startup of ADM1024; Logic 0 places it in standby mode. Caution:
The outputs of the interrupt pins will not be cleared if the user writes a 0 to this
location after an interrupt has occurred (see “INT Clear” bit). At startup, limit
checking functions and scanning begins. Note, all high and low limits should be set
into the ADM1024 prior to turning on this bit (PowerOn Default = 0).
1
INT_Enable
R/W
Logic 1 enables the INT_output. 1 = Enabled 0 = Disabled (PowerOn Default = 0).
2
THERM
Enable
R/W
0 = THERM disabled
1 = THERM enabled
3
INT_Clear
R/W
During Interrupt Service Routine (ISR), this bit is asserted Logic 1 to clear INT output
without affecting the contents of the Interrupt Status Register. The device will stop
monitoring. It will resume upon clearing of this bit. (PowerOn Default = 0)
4
RESET
R/W
Setting this bit generates a low going 45 ms reset pulse at Pin 12. This bit is
selfclearing and poweron default is 0.
5
Reserved
R/W
Default = 0
6
THERM CLR
R/W
A 1 clears the THERM output without changing the Status Register contents.
7
Initialization
R/W
Logic 1 restores poweron default values to the Configuration Register, Interrupt
Status Registers, Interrupt Mask Registers, Fan Divisor Register, and the
Temperature Configuration Register. This bit automatically clears itself since the
poweron default is 0.
Table 14. REGISTER 41H, INTERRUPT STATUS REGISTER 1 (POWER-ON DEFAULT, 00H)
Bit
Name
R/W
Description
0
2.5 V/External Temp2
Error
Read only
A 1 indicates that a High or Low limit has been exceeded.
1
VCCP1 Error
Read only
A 1 indicates that a High or Low limit has been exceeded.
2
VCC Error
Read only
A 1 indicates that a High or Low limit has been exceeded.
3
5.0 V Error
Read only
A 1 indicates that a High or Low limit has been exceeded.
4
Internal Temp Error
Read only
A 1 indicates that a temperature interrupt has been set, or that a High or Low limit
has been exceeded.
5
External Temp1 Error
Read only
A 1 indicates that a temperature interrupt has been set, or that a High or Low limit
has been exceeded.
6
FAN1/AIN1 Error
Read only
A 1 indicates that a High or Low limit has been exceeded.
7
FAN2/AIN2 Error
Read only
A 1 indicates that a High or Low limit has been exceeded.
Table 15. REGISTER 42H, INTERRUPT STATUS REGISTER 2 (POWER-ON DEFAULT, 00H) (Note 1 and 2)
Bit
Name
R/W
Description
0
12 V Error
Read only
A 1 indicates a High or Low limit has been exceeded.
1
VCCP2 Error
Read only
A 1 indicates a High or Low limit has been exceeded.
2
Reserved
Read only
Undefined.
3
Reserved
Read only
Undefined.
4
Chassis Error
Read only
A 1 indicates Chassis Intrusion has gone high.
5
THERM Interrupt
Read only
Indicates that THERM pin has been pulled low by an external source.
6
D1 Fault
Read only
Short or OpenCircuit Sensor Diode D1.
7
D2 Fault
Read only
Short or OpenCircuit Sensor Diode D2.
1. Any time the Status Register is read out, the conditions (i.e., Register) that are read are automatically reset. In the case of the channel priority
indication, if two or more channels were out of limits, then another indication would automatically be generated if it was not handled during
the ISR.
2. In the Mask Register, the errant voltage interrupt may be disabled until the operator has time to clear the errant condition or set the limit
higher/lower.
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