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參數(shù)資料
| 型號： | ADL5604ACPZ-R7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 放大器 |
| 英文描述： | 700 MHz - 2700 MHz RF/MICROWAVE WIDE BAND MEDIUM POWER AMPLIFIER |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, MO-220-VGGC, LFCSP_VQ, 16 PIN |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 609K |
| 代理商： | ADL5604ACPZ-R7 |
ADL5604
Rev. A | Page 19 of 24
ACPR AND EVM
All adjacent channel power ratio (ACPR) and error vector
magnitude (EVM) measurements were made using a single
W-CDMA carrier and Test Model 1-64.
The signal is generated by a very low ACPR source and is
measured at the output by a high dynamic range spectrum
analyzer. For ACPR measurements, the filter setting was chosen
for low ACPR and for EVM measurements the low EVM setting
was selected. The baseline composite EVM for the signal source
used was around 0.5%. Highly linear amplifiers were used to
measure ACPR and EVM at higher output power levels.
on the same plot is the system ACPR. For power levels up to
11 dBm, an ACPR of 65 dBc or better can be achieved.
the same plot is the system ACPR. For power levels up to
11 dBm, an ACPR of 65 dBc or better can be achieved.
same plot is the system ACPR. For power levels up to 12 dBm,
an ACPR of 65 dBc or better can be achieved. Figure 29 shows
the plot of EVM vs. POUT at 946 MHz. The EVM measured is
less than 1% for power levels up to 15 dBm.
measured is less than 1% for power levels up to 18 dBm.
measured is less than 1% for power levels up to 18 dBm.
When operated in the linear region, there is little or no
contribution to EVM by the amplifier.
THERMAL CONSIDERATIONS
The ADL5604 is packaged in a thermally efficient 4 mm × 4 mm,
16-lead LFCSP. The thermal resistance from junction to air (θJA)
is 32.1oC/W. The thermal resistance for the product was
extracted assuming a standard 4-layer JEDEC board with nine
copper filled thermal vias. The thermal resistance from junction
to case (θJC) is 6oC/W where case is the exposed pad of the lead
frame package.
For the best thermal performance, it is recommended to add as
many thermal vias as possible under the exposed pad of the
LFCSP. The above thermal resistance numbers assume a
minimum of nine thermal vias arranged in a 3 × 3 array with a
diameter of 8 mils and a pitch of 16 mils. Because the top and
bottom leads of the package are ground, the ground pattern on
the evaluation board is extended on the top and bottom to
improve thermal efficiency (see the Evaluation Board section).
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 42 shows the recommended land pattern for the ADL5604.
To minimize thermal impedance, the exposed paddle on the
4 mm × 4 mm LFCSP package is soldered down to a ground
plane along with Pin 5 to Pin 8 and Pin 13 to Pin 16. To
improve thermal dissipation, nine thermal vias are arranged in
a 3 × 3 array under the exposed paddle. Areas above and below
the paddle are tied with regular vias. If multiple ground layers
exist, they should be tied together using vias. For more inform-
ation on land pattern design and layout, see the AN-772
Application Note, A Design and Manufacturing Guide for the
Lead Frame Chip Scale Package (LFCSP).
5
8
13
16
RFIN
RFOUT
THERMAL VIAS
8 MIL
FILLED VIAs
16 MIL
FILLED VIAs
0
82
20
-0
43
Figure 42. Recommended Land Pattern
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADL5604-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD - Boxed Product (Development Kits) |
| ADL5605 | 制造商:AD 制造商全稱:Analog Devices 功能描述:700 MHz to 1000 MHz |
| ADL5605ACPZ-R7 | 功能描述:IC RF DRIVER AMP 16-LFCSP RoHS:是 類別:RF/IF 和 RFID >> RF 放大器 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 頻率:100MHz ~ 6GHz P1dB:9.14dBm（8.2mW） 增益:15.7dB 噪音數(shù)據(jù):1.3dB RF 型:CDMA，TDMA，PCS 電源電壓:2.7 V ~ 5 V 電流 - 電源:60mA 測試頻率:2GHz 封裝/外殼:0505（1412 公制） 包裝:帶卷 (TR) |
| ADL5605-EVALZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:700 MHz to 1000 MHz |
| ADL5606 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1800 MHz to 2700 MHz |
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