參數(shù)資料
型號(hào)： ADL5380ACPZ-WP
廠商： ANALOG DEVICES INC
元件分類(lèi)： 調(diào)制器/解調(diào)器
英文描述： 400 MHz - 6000 MHz RF/MICROWAVE I/Q DEMODULATOR
封裝： 4 X 4 MM, ROHS COMPLIANT, MO-220-VGGD-8, LFCSP-24
文件頁(yè)數(shù)： 15/36頁(yè)
文件大?。?/td> 833K
代理商： ADL5380ACPZ-WP
ADL5380
Rev. 0 | Page 22 of 36
CIRCUIT DESCRIPTION
The ADL5380 can be divided into five sections: the local
oscillator (LO) interface, the RF voltage-to-current (V-to-I)
converter, the mixers, the differential emitter follower outputs,
and the bias circuit. A detailed block diagram of the device is
shown in Figure 76.
RFIN
RFIP
ENBL
ADJ
QUADRATURE
PHASE SPLITTER
ADL5380
V2I
BIAS
LOIP
LOIN
IHI
ILO
QHI
QLO
07
58
5-
0
76
Figure 76. Block Diagram
The LO interface generates two LO signals at 90° of phase
difference to drive two mixers in quadrature. RF signals are
converted into currents by the V-to-I converters that feed into
the two mixers. The differential I and Q outputs of the mixers
are buffered via emitter followers. Reference currents to each
section are generated by the bias circuit. A detailed description
of each section follows.
LO INTERFACE
The LO interface consists of a polyphase quadrature splitter
followed by a limiting amplifier. The LO input impedance is set
by the polyphase, which splits the LO signal into two differential
signals in quadrature. The LO input impedance is nominally
50 Ω. Each quadrature LO signal then passes through a limiting
amplifier that provides the mixer with a limited drive signal. For
optimal performance, the LO inputs must be driven differentially.
V-TO-I CONVERTER
The differential RF input signal is applied to a V-to-I converter
that converts the differential input voltage to output currents.
The V-to-I converter provides a differential 50 Ω input impedance.
The V-to-I bias current can be adjusted up or down using the
ADJ pin (Pin 19). Adjusting the current up improves IIP3 and
IP1dB but degrades SSB NF. Adjusting the current down improves
SSB NF but degrades IIP3 and IP1dB. The current adjustment
can be made by connecting a resistor from the ADJ pin (Pin 19)
to VS to increase the bias current or to ground to decrease the
bias current. Table 4 approximately dictates the relationship
between the resistor used (RADJ), the resulting ADJ pin voltage,
and the resulting baseband common-mode output voltage.
Table 4. ADJ Pin Resistor Values and Approximate ADJ Pin
Voltages
RADJ
~VADJ (V)
~ Baseband Common-
Mode Output (V)
200 Ω to VS
4.8
2.2
600 Ω to VS
4.5
2.3
1.54 kΩ to VS
4
2.5
3.8 kΩ to VS
3.5
2.7
10 kΩ to VS
3
Open
2.5
3.2
9 kΩ to GND
2
3.4
3.5 kΩ to GND
1.5
3.6
1.5 kΩ to GND
1
3.8
MIXERS
The ADL5380 has two double-balanced mixers: one for the in-
phase channel (I channel) and one for the quadrature channel
(Q channel). These mixers are based on the Gilbert cell design
of four cross-connected transistors. The output currents from
the two mixers are summed together in the resistive loads that
then feed into the subsequent emitter follower buffers.
EMITTER FOLLOWER BUFFERS
The output emitter followers drive the differential I and Q signals
off chip. The output impedance is set by on-chip 25 Ω series
resistors that yield a 50 Ω differential output impedance for
each baseband port. The fixed output impedance forms a
voltage divider with the load impedance that reduces the effective
gain. For example, a 500 Ω differential load has 1 dB lower
effective gain than a high (10 kΩ) differential load impedance.
BIAS CIRCUIT
A band gap reference circuit generates the reference currents
used by different sections. The bias circuit can be enabled and
partially disabled using ENBL (Pin 7). If ENBL is grounded or
left open, the part is fully enabled. Pulling ENBL high shuts off
certain sections of the bias circuitry, reducing the standing
power to about half of its fully enabled consumption and
disabling the outputs.
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