參數(shù)資料
型號: ADL5371ACPZ-R2
廠商: ANALOG DEVICES INC
元件分類: 調(diào)制器/解調(diào)器
英文描述: 700 MHz - 1300 MHz RF/MICROWAVE QUADRAPHASE MODULATOR
封裝: LEAD FREE, MO-220VGGD-2, LFCSP-24
文件頁數(shù): 3/20頁
文件大?。?/td> 930K
代理商: ADL5371ACPZ-R2
ADL5371
Rev. 0 | Page 11 of 20
BASIC CONNECTIONS
Figure 23 shows the basic connections for the ADL5371.
VPS5
VPS3
VPS4
VPS2
VOUT
CO
M
2
LO
IN
LOIP
CO
M
2
CO
M
3
CO
M
3
Q
BBP
CO
M
4
Q
BBN
CO
M
4
IBBN
IBBP
COM1
VPS1
COM1
VPS1
1
2
3
4
5
6
18
17
16
15
14
13
VOUT
C13
0.1F
C11
OPEN
C12
0.1F
CLON
100pF
C14
0.1F
C15
0.1F
C16
0.1F
24
23
22
21
20
19
7
8
9
10
11
12
COUT
100pF
VPOS
VP
O
S
QBBP
QBBN
IBBN
IBBP
EXPOSED PADDLE
CLOP
100pF
LO
GND
Z1
F-MOD
06
51
0-
0
24
Figure 23. Basic Connections for the ADL5371
POWER SUPPLY AND GROUNDING
All the VPS pins must be connected to the same 5 V source.
Adjacent pins of the same name can be tied together and decoupled
with a 0.1 μF capacitor. These capacitors should be located as
close as possible to the device. The power supply can range
between 4.75 V and 5.25 V.
The COM1 pin, COM2 pin, COM3 pin, and COM4 pin should
be tied to the same ground plane through low impedance paths.
The exposed paddle on the underside of the package should also
be soldered to a low thermal and electrical impedance ground
plane. If the ground plane spans multiple layers on the circuit
board, they should be stitched together with nine vias under the
exposed paddle. The Application Note AN-772 discusses the
thermal and electrical grounding of the LFCSP in detail.
BASEBAND INPUTS
The baseband inputs QBBP, QBBN, IBBP, and IBBN must be
driven from a differential source. The nominal drive level of
1.4 V p-p differential (700 mV p-p on each pin) should be
biased to a common-mode level of 500 mV dc.
The dc common-mode bias level for the baseband inputs range
from 400 mV to 600 mV. This results in a reduction in the
usable input ac swing range. The nominal dc bias of 500 mV
allows for the largest ac swing, limited on the bottom end by the
ADL5371 input range and on the top end by the output compliance
range on most DACs from Analog Devices.
LO INPUT
A single-ended LO signal should be applied to the LOIP pin
through an ac coupling capacitor. The recommended LO drive
power is 0 dBm. The LO return pin, LOIN, should be ac-coupled
to ground through a low impedance path.
The nominal LO drive of 0 dBm can be increased to up to 7 dBm
to realize an improvement in the noise performance of the
modulator (see Figure 33). This improvement is tempered by
degradation in the sideband suppression performance (see
Figure 19) and, therefore, should be used judiciously. If the LO
source cannot provide the 0 dBm level, operation at a reduced
power below 0 dBm is acceptable. Reduced LO drive results in
slightly increased modulator noise. The effect of LO power on
sideband suppression and carrier feedthrough is shown in
Figure 19. The effect of LO power on GSM noise is shown in
RF OUTPUT
The RF output is available at the VOUT pin (Pin 13). The
VOUT pin connects to an internal balun, which is capable of
driving a 50 Ω load. For applications requiring 50 Ω output
impedance, external matching is needed (see Figure 8 for S22
performance). The internal balun provides a low dc path to
ground. In most situations, the VOUT pin should be ac-coupled
to the load.
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