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參數(shù)資料
| 型號(hào)： | ADG528AKPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 2/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTIPLEXER 8X1 20PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Switch Fundamentals |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 功能： | 多路復(fù)用器 |
| 電路： | 1 x 8:1 |
| 導(dǎo)通狀態(tài)電阻： | 700 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 10.8 V ~ 16.5 V，±10.8 V ~ 16.5 V |
| 電流 - 電源： | 600µA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 20-PLCC（9x9） |
| 包裝： | 帶卷 (TR) |
REV. B
–10–
ADG528A/ADG529A
TERMINOLOGY
RON
Ohmic resistance between terminals D and S
RON Match
Difference between the RON of any two channels
RON Drift
Change in RON versus temperature
IS (OFF)
Source terminal leakage current when the switch
is off.
ID (OFF)
Drain terminal leakage current when the switch is
off.
ID (ON)
Leakage current that flows from the closed switch
into the body.
VS (VD)Analog voltage on terminal S or D
CS (OFF)
Channel input capacitance for “OFF” condition
CD (OFF)
Channel output capacitance for “OFF” condition
CIN
Digital input capacitance
tON (EN)
Delay time between the 50% and 90% points of
the digital input and switch “ON” condition.
tOFF (EN)
Delay time between the 50% and 10% points of
the digital input and switch “OFF” condition
tTRANSITION
Delay time between the 50% and 90% points of
the digital inputs and switch “ON” condition
when switching from one address state to another.
tOPEN
“OFF” time measured between 50% points of
both switches when switching from one address
state to another
VINL
Maximum input voltage for Logic “0”
VINH
Minimum input voltage for Logic “1”
IINL (IINH)
Input current of the digital input
VDD
Most positive voltage supply
VSS
Most negative voltage supply
IDD
Positive supply current
ISS
Negative supply current
OUTLINE DIMENSIONS
18-Lead Plastic Dual In-Line Package [PDIP]
(N-18)
Dimensions shown in inches and (millimeters)
SEATING
PLANE
0.015 (0.38) MIN
0.180 (4.57)
MAX
0.022 (0.558)
0.014 (0.356)
0.150 (3.81)
0.110 (2.79)
0.100
(2.54)
BSC
0.060 (1.52)
0.045 (1.14)
18
1
9
10
0.885 (22.48)
0.845 (21.46)
0.295 (7.49)
0.275 (6.99)
0.015 (0.381)
0.008 (0.203)
0.325 (8.26)
0.300 (7.62)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AD
0.180 (4.57)
MAX
20-Lead Plastic Leaded Chip Carrier [PLCC]
(P-20A)
Dimensions shown in inches and (millimeters)
0.020 (0.50)
R
BOTTOM
VIEW
(PINS UP)
0.021 (0.53)
0.013 (0.33)
0.330 (8.38)
0.290 (7.37)
0.032 (0.81)
0.026 (0.66)
0.056 (1.42)
0.042 (1.07)
0.20 (0.51)
MIN
0.120 (3.04)
0.090 (2.29)
3
4
19
18
8
9
14
13
TOP VIEW
(PINS DOWN)
0.395 (10.02)
0.385 (9.78)
SQ
0.356 (9.04)
0.350 (8.89)
SQ
0.048 (1.21)
0.042 (1.07)
0.048 (1.21)
0.042 (1.07)
0.020
(0.50)
R
0.050
(1.27)
BSC
0.180 (4.57)
0.165 (4.19)
0.040 (1.01)
0.025 (0.64)
R
COMPLIANT TO JEDEC STANDARDS MO-047AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
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