參數(shù)資料
型號(hào): ADG466BRM-REEL7
廠商: ANALOG DEVICES INC
元件分類: 小信號(hào)晶體管
英文描述: 20 mA, N-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: MICRO, RM-8, SOIC-8
文件頁(yè)數(shù): 8/10頁(yè)
文件大?。?/td> 238K
代理商: ADG466BRM-REEL7
ADG466/ADG467
–7–
REV. A
CIRCUIT INFORMATION
Figure 17 below shows a simplified schematic of a channel
protector circuit. The circuit is made up of four MOS transis-
tors—two NMOS and two PMOS. One of the PMOS devices
does not lie directly in the signal path but is used to connect the
source of the second PMOS device to its backgate. This has the
effect of lowering the threshold voltage and so increasing the
input signal range of the channel for normal operation. The
source and backgate of the NMOS devices are connected for the
same reason. During normal operation the channel protectors
have a resistance of 60
typ. The channel protectors are very
low power devices, and even under fault conditions the supply
current is limited to sub microampere levels. All transistors are
dielectrically isolated from each other using a trench isolation
method. This makes it impossible to latch up the channel
protectors. For an explanation, see Trench Isolation section.
NMOS
PMOS
NMOS
VDD
VSS
VDD
Figure 17. The Channel Protector Circuit
Overvoltage Protection
When a fault condition occurs on the input of a channel protec-
tor, the voltage on the input has exceeded some threshold volt-
age set by the supply rail voltages. The threshold voltages are
related to the supply rails as follows. For a positive overvoltage,
the threshold voltage is given by VDD – VT where VTN is the
threshold voltage of the NMOS transistor (1.5 V typ). In the
case of a negative overvoltage the threshold voltage is given by
VSS – VTP where VTP is the threshold voltage of the PMOS de-
vice (2 V typ). If the input voltage exceeds these threshold volt-
ages, the output of the channel protector (no load) is clamped at
these threshold voltages. However, the channel protector output
will clamp at a voltage that is inside these thresholds if the out-
put is loaded. For example with an output load of 1 k
, V
DD =
15 V and a positive overvoltage. The output will clamp at VDD
VTN
V = 15 V – 1.5 V – 0.6 V = 12.9 V where
V is due to I
× R voltage drop across the channels of the MOS devices (see
Figure 19). As can be seen from Figure 19, the current during
fault condition is determined by the load on the output (i.e.,
VCLAMP/RL ). However, if the supplies are off, the fault current is
limited to the nano-ampere level.
Figures 18, 20 and 21 show the operating conditions of the
signal path transistors during various fault conditions. Figure 18
shows how the channel protectors operate when a positive over-
voltage is applied to the channel protector.
NMOS
PMOS
NMOS
VDD (+15V)
VSS (–15V)
VDD (+15V)
POSITIVE
OVERVOLTAGE
(+20V)
VDD – VTN*
(+13.5V)
*VTN = NMOS THRESHOLD VOLTAGE (+1.5V)
NON-
SATURATED
NON-
SATURATED
Figure 18. Positive Overvoltage on the Channel Protector
The first NMOS transistor goes into a saturated mode of opera-
tion as the voltage on its Drain exceeds the Gate voltage (VDD) –
the threshold voltage (VTN). This situation is shown in Figure
19. The potential at the source of the NMOS device is equal to
VDD – VTN. The other MOS devices are in a nonsaturated mode of
operations.
VS
N +
(VDD =15V)
VD
P –
N +
(+20V)
(+13.5V)
OVERVOLTAGE
OPERATION
(SATURATED)
VT = 1.5V
(VG – VT = 13.5V)
VG
EFFECTIVE
SPACE CHARGE
REGION
N CHANNEL
NMOS
PMOS
NONSATURATED
OPERATION
RL
V
IOUT
VCLAMP
Figure 19. Positive Overvoltages Operation of the Channel Protector
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADG467 制造商:AD 制造商全稱:Analog Devices 功能描述:Triple and Octal Channel Protectors
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ADG467BR-REEL7 功能描述:IC OCTAL PROTECTOR 18SOIC RoHS:否 類別:過(guò)電壓,電流,溫度裝置 >> TVS - 其它復(fù)合 系列:ADG467 標(biāo)準(zhǔn)包裝:1 系列:- 電壓 - 工作:120V 電壓 - 箝位:- 技術(shù):混合技術(shù) 功率(瓦特):- 電路數(shù):1 應(yīng)用:通用 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:- 包裝:散裝 其它名稱:UAK 2-PE/S-X-120AC-STUAK2-PE/S-X-120AC-ST
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