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參數(shù)資料
| 型號(hào)： | ADG441 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Quad SPST Switches(LC2MOS精密的四單刀單擲開關(guān)) |
| 中文描述： | 四路SPST開關(guān)（LC2MOS精密的四單刀單擲開關(guān)） |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 272K |
| 代理商： | ADG441 |
ADG441/ADG442/ADG444
REV. 0
–5–
TRENCH ISOLATION
In the ADG441, ADG442 and ADG444, an insulating oxide
layer (trench) is placed between the NMOS and the PMOS
transistors of each CMOS switch. Parasitic junctions, which oc-
cur between the transistors in junction isolated switches, are
eliminated, the result being a completely latch-up proof switch.
In junction isolation, the N and P wells of the PMOS and
NMOS transistors form a diode that is reverse-biased under
normal operation. However, during overvoltage conditions, this
diode becomes forward biased. A silicon-controlled rectifier
(SCR) type circuit is formed by the two transistors causing a sig-
nificant amplification of the current which, in turn, leads to
latch up. With trench isolation, this diode is removed, the result
being a latch-up proof switch.
Trench isolation also leads to lower leakage currents. The
ADG441, ADG442 and ADG444 have a leakage current
of 0.5 nA as compared with a leakage current of several
nanoamperes in non-trench isolated switches. Leakage current is
an important parameter in sample-and-hold circuits, this current
being responsible for the discharge of the holding capacitor with
time causing droop. The ADG441/ADG442/ADG444’s low
leakage current, along with its fast switching speeds, make it
suitable for fast and accurate sample-and-hold circuits.
Typical Performance Characteristics
NMOS
PMOS
P-WELL
N-WELL
BURIED OXIDE LAYER
SUBSTRATE (BACK GATE)
TRENCH
LOCOS
Figure 1. Trench Isolation
170
10
15
90
50
3
0
130
9
R
O
V
D
(V
S)
– Volts
6
12
T
A
= +25
°
C
150
110
70
30
V
DD
= +5V
V
SS
= 0V
V
DD
= +10V
V
SS
= 0V
V
DD
= +12V
V
SS
= 0V
V
DD
= +15V
V
SS
= 0V
100
20
15
60
40
–10
–15
80
10
0
R
O
V
D
(V
S)
– Volts
–5
5
T
A
= +25
°
C
V
DD
= +5V
V
SS
= –5V
V
DD
= +12V
V
SS
= –12V
V
DD
= +15V
V
SS
= –15V
V
DD
= +10V
V
SS
= –10V
Figure 3. R
ON
as a Function of V
D
(V
S
): Single Supply
Figure 2. R
ON
as a Function of V
D
(V
S
): Dual Supply
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADG451 | LC2MOS 5 ohm RON SPST Switches |
| ADG451BN | LC2MOS 5 ohm RON SPST Switches |
| ADG451BR | LC2MOS 5 ohm RON SPST Switches |
| ADG452BN | LC2MOS 5 ohm RON SPST Switches |
| ADG452BR | LC2MOS 5 ohm RON SPST Switches |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADG441ABCHIPS2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Quad SPST Switches ADG441/ADG442/ADG444 |
| ADG441ABN | 制造商:Analog Devices 功能描述:Analog Switch Quad SPST 16-Pin PDIP |
| ADG441ABN2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Quad SPST Switches ADG441/ADG442/ADG444 |
| ADG441ABR | 制造商:Analog Devices 功能描述:Analog Switch Quad SPST 16-Pin SOIC N |
| ADG441ABR2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Quad SPST Switches ADG441/ADG442/ADG444 |
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