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參數(shù)資料
| 型號(hào)： | ADG429TQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | LC2MOS Latchable 4-/8-Channel High Performance Analog Multiplexers |
| 中文描述： | 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDIP18 |
| 封裝： | CERAMIC, DIP-18 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 157K |
| 代理商： | ADG429TQ |
REV. C
–2–
ADG428/ADG429–SPECIFICATIONS
DUAL SUPPLY
1
(V
DD
= +15 V, V
SS
= –15 V, GND = 0 V,
WR
= 0 V,
RS
= 2.4 V unless otherwise noted)
B Version
–40
8
C to
+25
8
C +85
8
C
T Version
–55
8
C to
Parameter
+25
8
C +125
8
C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
R
ON
V
SS
to V
DD
V
SS
to V
DD
V
typ
max
% max
60
100
10
60
100
10
V
D
=
±
10 V, I
S
= –1 mA
125
125
R
ON
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF)
–10 V < V
S
< 10 V, I
S
= –1 mA
±
0.03
±
0.3
±
0.5
±
0.03
±
0.3
±
0.5
nA typ
nA max
V
D
=
±
10 V, V
S
=
7
10 V;
Test Circuit 2
V
D
=
±
10 V, V
S
=
7
10 V;
Test Circuit 3
±
50
±
50
Drain OFF Leakage I
D
(OFF)
ADG428
±
0.07
±
0.7
±
1
±
0.05
±
0.5
±
1
±
0.07
±
0.7
±
1
±
0.05
±
0.5
±
1
nA typ
nA max
nA typ
nA max
±
100
±
100
ADG429
±
50
±
50
Channel ON Leakage I
D
, I
S
(ON)
ADG428
ADG429
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
V
S
= V
D
=
±
10 V;
Test Circuit 4
±
1
±
1
±
100
±
50
±
1
±
1
±
100
±
50
nA max
nA max
2.4
0.8
2.4
0.8
V min
V max
±
0.1
8
±
1
±
0.1
8
±
1
μ
A max
pF typ
V
IN
= 0 or V
DD
f = 1 MHz
110
250
110
250
ns typ
ns max
R
L
= 1 M
, C
L
= 35 pF;
V
S1
=
±
10 V, V
S8
=
7
10 V;
Test Circuit 5
R
L
= 1 k
, C
L
= 35 pF;
V
S
= +5 V; Test Circuit 6
R
L
= 1 k
, C
L
= 35 pF;
V
S
= +5 V; Test Circuit 7
R
L
= 1 k
, C
L
= 35 pF;
V
S
= +5 V; Test Circuit 7
300
300
t
OPEN
10
10
ns min
t
ON
(EN,
WR
)
115
150
105
150
115
150
105
150
ns typ
ns max
ns typ
ns max
ns min
ns min
ns min
ns min
pC typ
225
225
t
OFF
(EN,
RS
)
300
100
100
10
100
300
100
100
10
100
t
W
, Write Pulsewidth
t
S
, Address, Enable Setup Time
t
H
, Address, Enable Hold Time
t
RS
, Reset Pulsewidth
Charge Injection
V
S
= +5 V
V
S
= 0 V, R
S
= 0
, C
L
= 10 nF;
Test Circuit 10
R
L
= 1 k
, C
L
= 15 pF, f = 100 kHz;
V
S
= 7 V rms, V
EN
= 0 V; Test Circuit 11
R
L
= 1 k
, C
L
= 15 pF, f = 100 kHz;
Test Circuit 12
f = 1 MHz
f = 1 MHz
4
4
OFF Isolation
–75
–60
85
–75
–60
85
dB typ
dB min
dB typ
Channel-to-Channel Crosstalk
C
S
(OFF)
C
D
(OFF)
ADG428
ADG429
C
D
, C
S
(ON)
ADG428
ADG429
POWER REQUIREMENTS
I
DD
11
11
pF typ
40
20
40
20
pF typ
pF typ
f = 1 MHz
54
34
54
34
pF typ
pF typ
V
IN
= 0 V, V
EN
= 0 V
20
100
0.001
5
20
100
0.001
5
μ
A typ
μ
A max
μ
A typ
μ
A max
I
SS
NOTES
1
Temperature ranges are as follows: B Version: –40
°
C to +85
°
C; T Version: –55
°
C to +125
°
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
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