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參數(shù)資料
| 型號(hào)： | ADG428BRZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MULTIPLEXER 8X1 18SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Switch Fundamentals |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | LC²MOS |
| 功能： | 多路復(fù)用器 |
| 電路： | 1 x 8:1 |
| 導(dǎo)通狀態(tài)電阻： | 90 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 12V，±15V |
| 電流 - 電源： | 20µA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 18-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 18-SO |
| 包裝： | 帶卷 (TR) |
| 其它名稱(chēng)： | ADG428BRZ-REEL-ND ADG428BRZ-REELTR |
REV. C
ADG428/ADG429
–5–
ADG428 Truth Table
A2
A1
A0
EN
WR RS
ON SWITCH
Latching
XXXX
g
1
Maintains Previous
Switch Condition
Reset
XXXXX0
NONE
(Latches Cleared)
Transparent Operation
X
0
1
NONE
000101
1
001101
2
010101
3
011101
4
100101
5
101101
6
110101
7
111101
8
ADG429 Truth Table
A1
A0
EN
WR
RS
ON SWITCH PAIR
Latching
XXX
g
1
Maintains Previous
Switch Condition
Reset
XXXX0
NONE
(Latches Cleared)
Transparent Operation
X
0
1
NONE
001011
011012
101013
111014
TERMINOLOGY
VDD
Most positive power supply potential.
VSS
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
GND
Ground (0 V) reference.
RON
Ohmic resistance between D and S.
R
ON
Difference between the RON of any two
channels.
IS (OFF)
Source leakage current when the switch is off.
ID (OFF)
Drain leakage current when the switch is off.
ID, IS (ON)
Channel leakage current when the switch is
on.
VD (VS)
Analog voltage on terminals D, S.
CS (OFF)
Channel input capacitance for “OFF”
condition.
CD (OFF)
Channel output capacitance for “OFF”
condition.
CD, CS (ON)
“ON” switch capacitance.
CIN
Digital input capacitance.
tON (EN)
Delay time between the 50% and 90% points
of the digital input and switch “ON”
condition.
tOFF (EN)
Delay time between the 50% and 90% points
of the digital input and switch “OFF”
condition.
tTRANSITlON
Delay time between the 50% and 90% points
of the digital inputs and the switch “ON”
condition when switching from one address
state to another.
tOPEN
“OFF” time measured between 80% points of
both switches when switching from one
address state to another.
VINL
Maximum input voltage for Logic “0.”
VINH
Minimum input voltage for Logic “1.”
IINL (IINH)
Input current of the digital input.
Crosstalk
A measure of unwanted signal which is
coupled through from one channel to another
as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling
through an “OFF” channel.
Charge
A measure of the glitch impulse transferred
Injection
from the digital input to the analog output
during switching.
IDD
Positive supply current.
ISS
Negative supply current.
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