VDD Most positive power supply potential. V<" />
參數(shù)資料
型號: ADG419BRMZ
廠商: Analog Devices Inc
文件頁數(shù): 3/16頁
文件大?。?/td> 0K
描述: IC SWITCH SPDT 8MSOP
產(chǎn)品培訓模塊: iCMOS™ Switches and Multiplexers for Data Acquisition
Switch Fundamentals
標準包裝: 50
系列: LC²MOS
功能: 開關(guān)
電路: 1 x SPDT - NC/NO
導通狀態(tài)電阻: 40 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 12V,±15V
電流 - 電源: 100pA
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設(shè)備封裝: 8-MSOP
包裝: 管件
產(chǎn)品目錄頁面: 800 (CN2011-ZH PDF)
ADG419
Rev. B | Page 11 of 16
TERMINOLOGY
VDD
Most positive power supply potential.
VSS
Most negative power supply potential in dual-supply applications.
In single-supply applications, it may be connected to GND.
VL
Logic power supply (5 V).
GND
Ground (0 V) reference.
S
Source terminal. May be an input or an output.
D
Drain terminal. May be an input or an output.
IN
Logic control input.
RON
Ohmic resistance between D and S.
IS (Off)
Source leakage current with the switch off.
ID (Off)
Drain leakage current with the switch off.
ID, IS (On)
Channel leakage current with the switch on.
VD (VS)
Analog voltage on terminals D, S.
CS (Off)
Off switch source capacitance.
CD, CS (On)
On switch capacitance.
tTRANSITION
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
tD
Off time or on time measured between the 90% points of both
switches when switching from one address state to the other.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an off channel.
IDD
Positive supply current.
ISS
Negative supply current.
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