
ADG1406/ADG1407
Rev. A | Page 18 of
20
TEST CIRCUITS
IDS
SD
VS
V
074
19
-12
5
Figure 27. On Resistance
SD
VS
A
VD
IS (OFF)
ID (OFF)
074
19
-02
6
Figure 28. Off Leakage
SD
A
VD
ID (ON)
NC
NC = NO CONNECT
07
41
9-
02
7
Figure 29. On Leakage
3V
0V
OUTPUT
tr < 20ns
tf < 20ns
ADDRESS
DRIVE (VIN)
tTRANSITION
50%
90%
OUTPUT
ADG14061
50
300
GND
S1
S2 TO S15
S16
D
35pF
VIN
2.4V
EN
VDD
VSS
VDD
VSS
VS1
VS16
1SIMILAR CONNECTION FOR ADG1407.
A0
A2
A1
A3
07
41
9-
02
8
Figure 30. Address to Output Switching Times, tTRANSITION
3V
0V
OUTPUT
80%
ADDRESS
DRIVE (VIN)
tBBM
OUTPUT
ADG14061
50
300
GND
S1
S2 TO S15
S16
D
35pF
VIN
2.4V
EN
VDD
VSS
VDD
VSS
VS
1SIMILAR CONNECTION FOR ADG1407.
A0
A2
A1
A3
07
41
9-
0
29
Figure 31. Break-Before-Make Delay, tBBM
3V
0V
OUTPUT
50%
tOFF (EN)
tON (EN)
0.9VOUT
ENABLE
DRIVE (VIN)
OUTPUT
ADG14061
300
GND
S1
S2 TO S16
D
35pF
50
VIN
EN
VDD
VSS
VDD
VSS
VS
1SIMILAR CONNECTION FOR ADG1407.
A0
A2
A1
A3
0
74
19
-03
0
Figure 32. Enable Delay, tON (EN), tOFF (EN)