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參數(shù)資料
型號(hào): ADG1209YRZ-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 19/20頁(yè)
文件大小: 0K
描述: IC MULTIPLEXER DUAL 4X1 16SOIC
產(chǎn)品培訓(xùn)模塊: Switch Fundamentals
設(shè)計(jì)資源: Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104)
標(biāo)準(zhǔn)包裝: 1,000
系列: iCMOS®
功能: 多路復(fù)用器
電路: 2 x 4:1
導(dǎo)通狀態(tài)電阻: 475 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 12V,±15V
電流 - 電源: 220µA
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
ADG1208/ADG1209
Rev. B | Page 8 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
EN
9
VSS
S1
S4
S3
S2
A0
A2
GND
VDD
S7
S6
S5
A1
ADG1208
TOP VIEW
(Not to Scale)
DS8
0
57
13
-00
2
PIN 1
INDICATOR
1
Figure 3. ADG1208 Pin Configuration (TSSOP/SOIC)
VSS
2
S1
3
S2
4
S3
11 VDD
12 GND
10 S5
9S6
5
S
4
6
D
7
S
8
S
7
15
A
0
16
E
N
14
A
1
13
A
2
TOP VIEW
(Not to Scale)
ADG1208
05
71
3-
0
04
Figure 4. ADG1208 Pin Configuration (LFCSP_VQ),
Exposed Pad Tied to Substrate, VSS
Table 4. ADG1208 Pin Function Descriptions
Pin Number
TSSOP/SOIC
LFCSP_VQ
Mnemonic
Description
1
15
A0
Logic Control Input.
2
16
EN
Active High Digital Input. When low, the device is disabled and all switches are off. When
high, Ax logic inputs determine on switches.
3
1
VSS
Most Negative Power Supply Potential. In single-supply applications, it can be
connected to ground.
4
2
S1
Source Terminal 1. Can be an input or an output.
5
3
S2
Source Terminal 2. Can be an input or an output.
6
4
S3
Source Terminal 3. Can be an input or an output.
7
5
S4
Source Terminal 4. Can be an input or an output.
8
6
D
Drain Terminal. Can be an input or an output.
9
7
S8
Source Terminal 8. Can be an input or an output.
10
8
S7
Source Terminal 7. Can be an input or an output.
11
9
S6
Source Terminal 6. Can be an input or an output.
12
10
S5
Source Terminal 5. Can be an input or an output.
13
11
VDD
Most Positive Power Supply Potential.
14
12
GND
Ground (0 V) Reference.
15
13
A2
Logic Control Input.
16
14
A1
Logic Control Input.
Table 5. ADG1208 Truth Table
A2
A1
A0
EN
On Switch
X
0
None
0
1
0
1
2
0
1
0
1
3
0
1
4
1
0
1
5
1
0
1
6
1
0
1
7
1
8
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