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參數(shù)資料
| 型號(hào)： | ADDS-2106X-EZLITE |
| 英文描述： | DSP KIT |
| 中文描述： | DSP套件 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 154K |
| 代理商： | ADDS-2106X-EZLITE |
REV. B
–8–
ADDS-210xx-TOOLS
T he EZ-ICE probes plug directly onto these connectors for
chip-on-board emulation. You must add a JT AG connector to
your target board design if you intend to use the EZ-ICE. It is
possible to support multiprocessor SHARC systems using a
single JT AG connector and EZ-ICE. Figure 4 shows the
dimensions of the ADSP-21060 SHARC EZ-ICE T AP probe.
Be sure to allow enough room in your system to fit the probe’s
cable connector onto the target’s JT AG connector.
ADSP-2106x Emulator Connector Specification
T he 2-row, 14-pin ADSP-2106x pin strip header is keyed at the
Pin 3 location—you must remove Pin 3 from the header. T he
pins must be 0.025 inch square and at least 0.20 inch long. Pin
spacing should be 0.100
×
0.100 inches. Pin strip headers are
available from vendors such as 3M, McK enzie, and Samtec.
T he length of the traces between the EZ-ICE probe connector
and the processor’s test access port pins should be as short as
possible. Note that the EZ-ICE probe adds two T T L loads to
the CLK IN pin.
RIBBON
CABLE
BOTTOM
VIEW
ALL DIMENSIONS IN INCHES AND (mm)
1.893
(48.1)
RIBBON
CABLE
RIBBON CABLE LENGTH
= 59.2 INCHES (1503.7 mm)
3.187 (80.9)
0.577 (14.7)
9.5 (241.3)
Figure 4. ADSP-2106x SHARC EZ-ICE TAP Probe
T he BMT S, BT CK ,
BTRST
, and BT DI signals are provided so
that the test access port can also be used for board-level testing.
When the connector is not being used for emulation, place
jumpers between the BX X X pins and the X X X pins as shown in
Figure 5. If you are not going to use the test access port for
board test, tie
BTRST
to GND and tie or pull up BT CK to
V
DD
. T he
TRST
pin must be asserted (pulsed low) after power
up (through
BTRST
on the connector) or held low for proper
operation of the processor.
ICEPAC Embeddable In-Circuit Emulator
T he ICEPAC is a small (business card size) daughter card that
contains emulator-specific hardware that incorporates emulation
functionality into a plug-in target board. With ICEPAC, you
can use standard ADSP-2106x EZ-ICE software for full in-
circuit emulation capability.
T he ICEPAC interfaces to the PC Host through an 8-bit data
bus, and to the target system through its (IEEE 1149.1) JT AG
test access port. T he ICEPAC connector is a superset of the
standard EZ-ICE target board connector.
Using EZ-LAB and EZ-ICE Together
For the ADSP-2106x SHARC EZ-LAB Development System,
the only additional component required to have in-circuit
emulation is an ICEPAC module. T he EZ-ICE board’s
interface and probe functions are built into the EZ-LAB System.
T ogether, EZ-LAB and ICEPAC combine to form a high speed
DSP workstation with an interactive, window-based debugging
interface. T his setup lets you develop and test your application
without any additional time investment in hardware prototyping.
Combined Software and Hardware Packages
EZ-K IT Packages for the ADSP-21000 Family processors offer
complete development tools sets at an affordable price.
SHARC EZ-KIT
In addition to the EZ-LAB Development Board, ADSP-2106x
EZ-K IT contains the ADSP-2106x EZ-LAB and the ADSP-
21000 Family Development Software: Simulator, Assembler,
G21K C Compiler, C Source Level Debugger, Linker,
Librarian, and PROM Splitter. Also included are abridged
versions of software from SHARC T hird Party developers. T his
package creates a complete development environment for
programming applications in assembly language.
ADSP-21020 Development T ools
ADSP-21020 EZ-LAB Evaluation Board
Similar to the EZ-LAB SHARC Development Board, the
ADSP-21020 EZ-LAB lets you control and observe ADSP-
21020 programs executing in real-time from on-board RAM.
T he large memory space—up to 4 Mbits of SRAM—lets you
develop high performance floating-point DSP applications.
Unlike the EZ-LAB SHARC Development Board, the ADSP-
21020 EZ-LAB is a stand-alone board that interfaces to the host
computer through an RS-232 serial link. Several demonstration
programs accompany EZ-LAB for you to familiarize yourself
with and evaluate the ADSP-21020 floating-point DSPs.
Platform Requirements
T he ADSP-21020 EZ-LAB requires a power supply that can
deliver +5 V dc @ 1 amp and
±
12 V dc @ 200 mA.
Memory
T he ADSP-21020 EZ-LAB contains 32K
×
48-bit words of
zero-wait state program memory and 32K
×
48-bit words of
zero-wait state data memory.
Expansion Connectors
T wo expansion connectors let you add additional program
memory, data memory, and I/O devices to customize the
system. T he 96-pin expansion connectors accept standard
Eurocard prototyping boards (6U or 3U form factor).
PC Control
A host PC controls the ADSP-21020 EZ-LAB board through an
RS-232 link. With this connection, you can download and run
ADSP-21000 Family programs using interface software that
runs on the PC. Program results may be uploaded from EZ-
LAB’s on-board memory to the host PC. For code debug, plug
the ADSP-21020 EZ-ICE Emulator probe into the EZ-LAB’s
JT AG emulation connection.
Analog Interface
A basic analog interface is provided on-board, based on an
AD1849 SoundPort Stereo Codec, for developing speech and
audio processing applications. A 16-bit sigma-delta audio
codec, the AD1849 integrates two sigma-delta DACs, two
sigma-delta ADCs, anti-aliasing filters, digital interpolation
filters, attenuators, and analog anti-imaging filters in a single
package. It handles multiple channels of stereo input and
output, and allows sampling rates from 8 kHz to 48 kHz.
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相關(guān)代理商/技術(shù)參數(shù) |
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| ADDS-2111-EZ-ICE | 制造商:AD 制造商全稱:Analog Devices 功能描述:ADSP-2100 Family Development Tools |
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| ADDS-2111-EZ-LAB | 制造商:AD 制造商全稱:Analog Devices 功能描述:ADSP-2100 Family Development Tools |
| ADDS-21160-EZLITE | 制造商:Analog Devices 功能描述:Development Tools For The Adsp-21160 Dsp |
| ADDS-21161N-EZLITE | 制造商:Analog Devices 功能描述:Evaluation Board For ADSP-21161N DSP |
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