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參數(shù)資料
| 型號(hào)： | ADDS-21065LE-EZLAB |
| 英文描述： | EVALUATION BOARD DSP |
| 中文描述： | 評(píng)價(jià)板上DSP |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 154K |
| 代理商： | ADDS-21065LE-EZLAB |
REV. B
–6–
ADDS-210xx-TOOLS
MIN(X ,Y)
MAX (X ,Y)
ABS(X )
SWAP(X ,Y)
Returns the minimum of X and Y
Returns the maximum of X and Y
Returns the absolute value of X and Y
Swaps the values of X and Y
∑
SUM(var, n, expr)
Returns
exp r
var
=
0
FORALL(var, n, body)
FOREVER( )
CIRCULAR_BUFFER(T YPE,
DAGREG, name)
BASE(name)
Does body n times
ADSP-21020 idling
Circular buffer declaration macro
Circular buffer register initialization
macro
Circular buffer register initialization
macro
LENGT H(name)
CIRC_READ(ptr, step,
variable, memory)
CIRC_WRIT E(ptr, step,
variable, memory)
CIRC_MODIFY(ptr, step)
CLIP(X ,Y)
Circular buffer access macro
Circular buffer access macro
Circular buffer access macro
Clip Y by Z: |Rx| < |Ry| then Rx,
else if Rx < 0 then –Ry, else Ry
Returns (x+y)/2
AVG(X ,Y)
T he following provide direct access to actual assembly instructions in
the ADSP-210xx Family
SCALB(X ,Y)
Returns a value which is a scaled
exponent of X added to the fixed-
point twos-complement integer Y
Returns the mantissa from the float X
Returns the conversion of the expo-
nent of the float in X to an unbiased
twos-complement fixed point integer
Returns the conversion of a floating
point operand in X to a twos-
complement 32-bit fixed point integer
Returns the conversion of a fixed-
point integer in X to a floating
point; Y is a scaling factor which is
added to the exponent of the result
Returns an 8-bit accurate seed for 1/X
Returns a 4-bit accurate seed for
1/sqrt(X )
Returns the sign of the floating point
value in Y copied to the floating
point value in X without changing
the exponent
Returns a fixed point integer equal
to X with the Y bits cleared
Returns a fixed point integer equal
to X with the Y bits toggled
Returns a fixed point integer equal
to X with the Y bits set
Returns an exponent of a fixed point
integer
Returns the number of leading zeroes
from the fixed point value X
Returns the number of leading ones
from the fixed point value X
Calculate log base 2 of a number (int)
MANT (X )
LOGB(X )
FIX BY(X ,Y)
FLOAT BY(X ,Y)
RECIPS(X )
RSQRT S(X )
COPYSIGN(X ,Y)
BCLR(X ,Y)
BT GL(X ,Y)
BT ST (X ,Y)
EX P(X )
LEFT Z(X )
LEFT O(X )
LOG2I(a)
T able II. Library Macros
HARDWARE DE VE LOPME NT T OOLS
Hardware tools for developing ADSP-21000 Family based
products are divided into two categories: 1) for the ADSP-
2106x SHARC, and 2) for the ADSP-21020 floating-point
digital signal processors.
ADSP-2106x SHARC Development T ools
EZ-LAB Development Board Overview
: T he EZ-LAB
Development Board is a 16-bit AT compatible plug-in board
that lets you control and observe ADSP-2106x executable
programs operating in real-time from on-board RAM. Optional
processor and memory expansion modules from third parties let
you customize the EZ-LAB. Several demonstration programs
accompany EZ-LAB for you to
familiarize yourself with and evaluate the ADSP-2106x floating-
point DSPs. Figure 2 shows the EZ-LAB Board.
Platform Requirements
: T he ADSP-2106x EZ-LAB can draw
power from the host PC or from an external power source
when used in a stand-alone mode. T he EZ-LAB’s power
requirements are: +5 V dc @ 1 A, +12 V dc @ 400 mA, and
–12 V dc @ 400 mA. (Note: T he use of any SHARCPAC or
ICEPAC module will add to the power requirements.)
Memory
: T he ADSP-2106x EX -LAB is equipped with up to
512K x8 of Boot PROM for program storage and up to 4 Mbits
of SRAM on the DSP itself. T his can be supplemented with
additional memory through a memory expansion SHARCPAC
module.
Expansion Connectors
: T he EZ-LAB has several expansion
connectors. T hese include the MAFE expansion connector,
the SHARCPAC module connectors, the SHARCNET
connectors, and the JT AG in-circuit emulator connector.
T he Modular Analog Front End (MAFE) connector provides a
standard interface for real world analog interface I/O daughter-
boards. T he SHARCPAC connectors provide an interface for
optional SHARCPAC modules that may take on a multitude of
special functions, including memory expansion and multi-
processing applications. T he SHARCNET connectors let you
access two link ports from the on-board DSP and to two link
ports from the SHARCPAC module connectors. T he JT AG
connector provides an interface for an in-circuit emulator probe
such as the EZ-ICE or the ICEPAC In-Circuit Emulator module.
MAFE Daughtercard
: A sample analog interface MAFE
daughtercard is supplied with the EZ-LAB. T his card contains
an Analog Devices AD1847-based sound codec and supporting
hardware for audio input and output.
PC Interface
: T he EZ-LAB can be interfaced to a host PC by
plugging the board into a 16-bit ISA expansion slot within the
PC. T he host PC has access to the on-board resources and the
SHARCPAC expansion port through the ISA bus. Jumpers are
used for address and interrupt selection, thus minimizing
potential conflicts.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADDS-2106X-EZLITE | DSP KIT |
| ADDS-2181-EZLITE | EZ-KIT Lite for Analog Devices ADSP-218x DSP Family.(945.78 k) |
| ADDS2121 | Logic IC |
| ADDS2123C | Logic IC |
| ADDS2130 | Logic IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADDS-21065L-EZ-LAB | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| ADDS-21065L-EZLITE | 制造商:Analog Devices 功能描述:EVALUATION KIT 21065L DSP 制造商:Analog Devices 功能描述:SHARC, ADSP-21065L, RS232, EVAL KIT |
| ADDS-2106X-EZLITE | 制造商:Analog Devices 功能描述:DEVELOPMENT KIT ADDS 2106X |
| ADDS-2111-EZ-ICE | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:ADSP-2100 Family Development Tools |
| ADDS-2111-EZ-KIT | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:ADSP-2100 Family Development Tools |
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