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參數(shù)資料
| 型號： | ADC |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 295K |
| 代理商： | ADC |
TL/H/11929
A
October 1993
ADC1252 Self-Calibrating 12-Bit Plus Sign
A/D Converter with Sample-and-Hold
General Description
The ADC1252 is a CMOS 12-bit plus sign successive ap-
proximation analog-to-digital converter. On request, the
ADC1252 goes through a self-calibration cycle that adjusts
for any zero, full scale, or linearity errors. The ADC1252 also
has the ability to go through an Auto-Zero cycle that cor-
rects the zero error during every conversion.
The analog input to the ADC1252 is tracked and held by the
internal circuitry, so an external sample-and-hold is not re-
quired. The ADC1252 has an S/H control input which direct-
ly controls the track-and-hold state of the A/D. A unipolar
analog input voltage range (0 to
a
5V) or a bipolar range
(
b
5V to
a
5V) can be accommodated with
g
5V supplies.
The 13-bit data result is available on the eight outputs of the
ADC1252 in two bytes, high-byte first and sign extended.
The digital inputs and outputs are compatible with TTL or
CMOS logic levels.
Features
Y
Self-calibration provides excellent temperature stability
Y
Internal sample-and-hold
Y
8-bit
m
P/DSP interface
Y
Bipolar input range with a single
a
5V reference
Y
No missing codes over temperature
Y
TTL/MOS input/output compatible
Key Specifications
Y
Resolution
12 bits plus sign
8
m
s (max)
83 kHz (max)
Y
Conversion Time
Y
Sampling Rate
Y
Linearity Error
g
1 LSB (
g
0.0146%) (max)
g
2 LSB (max)
g
3 LSB (max)
113 mW (max)
Y
Zero Error
Y
Full Scale Error
Y
Power Consumption
@
g
5V
Applications
Y
Digital signal processing
Y
High resolution process control
Y
Instrumentation
Simplified Block Diagram
TL/H/11929–1
Connection Diagram
Dual-In-Line Package
TL/H/11929–2
Top View
Ordering Information
Industrial
Package
(
b
40
§
C
s
T
A
s
a
85
§
C)
ADC1252CIJ
J24A
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M115/Printed in U. S. A.
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