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參數(shù)資料
| 型號(hào)： | ADC1412D125HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Dual 14-bit ADC 125 Msps CMOS or LVDS DDR digital outputs |
| 封裝： | ADC1412D125HN/C1<SOT804-3|<<<1<Always Pb-free,;ADC1412D125HN/C1<SOT804-3|<<<1<Always Pb-free,; |
| 文件頁數(shù)： | 1/43頁 |
| 文件大?。?/td> | 1347K |
| 代理商： | ADC1412D125HN |
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1. General description
The ADC1412D is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for
high dynamic performance and low power consumption at sample rates up to 125 Msps.
Pipelined architecture and output error correction ensure the ADC1412D is accurate
enough to guarantee zero missing codes over the entire operating range. Supplied from a
single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in Complementary
Metal Oxide Semiconductor (CMOS) mode because of a separate digital output supply. It
supports the Low Voltage Differential Signalling (LVDS) Double Data Rate (DDR) output
standard. An integrated Serial Peripheral Interface (SPI) allows the user to easily
configure the ADC. The device also includes an programmable full-scale SPI to allow a
flexible input voltage range of 1 V (p-p) to 2 V (p-p). With excellent dynamic performance
from the baseband to input frequencies of 170 MHz or more, the ADC1412D is ideal for
use in communications, imaging and medical applications.
2. Features and benefits
SNR, 72.1 dBFS
SFDR, 86 dBc
Sample rate up to 125 Msps
Clock input divided by 2 to reduce jitter
contribution
Single 3 V supply
Flexible input voltage range:
1 V to 2 V (p-p)
CMOS or LVDS DDR digital outputs
Pin and software compatible with
ADC1212D series and ADC1112D125
3. Applications
Wireless and wired broadband
communications
Spectral analysis
Ultrasound equipment
ADC1412D series
Dual 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps;
CMOS or LVDS DDR digital outputs
Rev. 4 — 4 March 2011
Product data sheet
Input bandwidth, 600 MHz
Power dissipation, 855 mW at 80 Msps
Serial Peripheral Interface (SPI)
Duty cycle stabilizer
Fast OuT-of-Range (OTR) detection
Offset binary, two’s complement, gray
code
Power-down and Sleep modes
HVQFN64 package
Portable instrumentation
Imaging systems
Software defined radio
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADC1413D065HN | Dual 14 bits ADC; 65 Msps; serial JESD204A |
| ADC1413D065HN | Dual 14 bits ADC; 65 Msps; serial JESD204A |
| ADC1413D080HN | Dual 14 bits ADC; 80 Msps; serial JESD204A |
| ADC1413D105HN | Dual 14 bits ADC; 105 Msps; serial JESD204A |
| ADC1413D125HN | Dual 14 bits ADC; 125 Msps; serial JESD204A |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC1412D125HN/C1,5 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14bit 72dB 125MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1412D125HN/C1/1 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14bit 72dB 125MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1412D125HN/C1+518 | 制造商:NXP Semiconductors 功能描述:Cut Tape 制造商:NXP Semiconductors 功能描述:0 |
| ADC1412D125HN-C1 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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