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參數(shù)資料
| 型號(hào)： | ADC14071EVAL |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 14-Bit, 7 MSPS, 380 mW A/D Converter |
| 中文描述： | 14位，7 MSPS的，380毫瓦的A / D轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 7/18頁(yè) |
| 文件大小： | 427K |
| 代理商： | ADC14071EVAL |
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AC Electrical Characteristics
(Continued)
The following specifications apply for AGND = DGND = DR GND = 0V, V
= V
D
= +5.0V
, DR V
= 3.0V or 5.0V, PD = 0V,
V
= +2.0V, V
IN
(common mode) = 1.0V, f
= 7 MHz
@
50% duty cycle, t
r
, t
f
= 4 ns, C
L
= 20 pF/pin.
Boldface limits
apply for T
A
= T
J
= T
MIN
to T
MAX
: all other limits T
A
= T
J
= 25C (Notes 7, 8, 9)
Symbol
Parameter
Conditions
Typical
(Note 10)
63
63
Limits
(Note 11)
Units
t
CL
t
CH
Conversion Clock Low Time
Conversion Clock High Time
ns(min)
ns(min)
Clock
Cycles
ns
ps(rms)
ns(max)
ns(max)
ns
ns
t
CONV
Conversion Latency
12
t
AD
t
AJ
Aperture Delay
Aperture Jitter
3
5
t
OD
Rising Edge of CLOCK to Data Valid
DRV
D
= 3.0V
DRV
D
= 5.0V
45
34
35
12
58
53
t
EN
t
DIS
OE Low to Data Valid on D00 – D13
OE High to D0 – D13 into TRI-STATE
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed speci-
fications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2:
All voltages are measured with respect to GND = AGND = DGND = DR GND = 0V, unless otherwise specified.
Note 3:
When the input voltage at any pin exceeds the power supplies (that is, V
<
AGND or V
>
V
or V
), the current at that pin should be limited to 25 mA
(10 mA for pins 1, 45 and 47). The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input
current of 25 mA to two.
Note 4:
The absolute maximum junction temperature (T
max) for this device is 150C. The maximum allowable power dissipation is dictated by T
max, the
junction-to-ambient thermal resistance (
θ
), and the ambient temperature (T
), and can be calculated using the formula P
MAX = (T
max - T
)/
θ
. In the 48-pin
TQFP,
θ
is 76C/W, so P
MAX = 1,345 mW at 25C and 855 mW at the maximum operating ambient temperature of 85C. Note that the power dissipation of this
device under normal operation will typically be about 400 mW (380 mW quiescent power +20 mW due to 1 TTL load on each digital output. The values for maximum
power dissipation listed above will be reached only when the ADC14071 is operated in a severe fault condition (e.g. when input or output pins are driven beyond the
power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5:
Human body model is 100 pF capacitor discharged through a 1.5 k
resistor. Machine model is 220 pF discharged through ZERO ohms.
Note 6:
See AN450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book, for other methods of soldering surface mount devices.
Note 7:
The inputs are protected as shown below. Input voltage magnitudes up to 0.3V above V
or to 0.3V below GND will not damage this device, provided current
is limited per (Note 3). However, errors in the A/D conversion can occur if the input goes above (V
2.0V) or below GND by more than 300 mV. As an example, if
V
A
is 4.75V
DC
, the full-scale input voltage must be
≤
2.75V
DC
or
≥
300 mV to ensure accurate conversions.
Note 8:
To guarantee accuracy, it is required that V
A
and V
D
be connected together and to the same power supply with separate bypass capacitors at each V
+
pin.
Note 9:
With the test condition for V
REF
= (V
REF
+ V
REF
) given as +2.0V, the 14-bit LSB is 244 μV.
Note 10:
Typical figures are at T
A
= T
J
= 25C, and represent most likely parametric norms.
Note 11:
Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 12:
Integral Non-Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive full-scale and
negative full-scale.
Note 13:
Optimum SNR performance will be obtained by keeping the reference input in the 1.8V to 2.7V range. The LM4041CIM3-ADJ (SOT-23 package) or the
LM4041CIZ-ADJ (TO-92 package bandgap voltage reference is recommended for this application.
DS101101-8
ESD Protection Scheme for Input and Output Pins
A
www.national.com
7
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