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參數(shù)資料
| 型號(hào)： | ADC12L032CIWM |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類(lèi)： | ADC |
| 英文描述： | 3.3V Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold |
| 中文描述： | 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | SOP-20 |
| 文件頁(yè)數(shù)： | 7/36頁(yè) |
| 文件大?。?/td> | 828K |
| 代理商： | ADC12L032CIWM |
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Converter Electrical Characteristics
(Continued)
The following specifications apply for V
+
= V
+ = V
+ = +3.3 V
, V
REF
+ = +2.500 V
, V
= 0 V
, 12-bit + sign conver-
sion mode, f
= f
= 5 MHz, R
= 25
, source impedance for V
+ and V
≤
25
, fully-differential input with fixed
1.250V common-mode voltage, and 10(t
) acquisition time unless otherwise specified.
Boldface limits apply for T
A
= T
J
=
T
MIN
to T
MAX
; all other limits T
A
= T
J
= 25C. (Notes 7, 8, 9)
Symbol
Parameter
Conditions
Typical
(Note 10)
Limits
(Note 11)
Units
(Limits)
REFERENCE INPUT, ANALOG INPUTS AND MULTIPLEXER CHARACTERISTICS
MUXOUT1 and MUXOUT2
Leakage Current
R
ON
MUX On Resistance
V
MUXOUT
= 3.3V or
V
MUXOUT
= 0V
V
IN
= 1.65V and
V
MUXOUT
= 1.55V
V
IN
= 1.65V and
V
MUXOUT
= 1.55V
V
IN
= 3.3 V
PP
, f
IN
= 40 kHz
0.01
0.3
μA (max)
1300
1900
(max)
R
ON
Matching Channel to Channel
5
%
Channel to Channel Crosstalk
MUX Bandwidth
72
90
dB
kHz
DC and Logic Electrical Characteristics
The following specifications apply for V
+
= V
+ = V
+ = +3.3 V
, V
REF
+ = +2.500 V
, V
= 0 V
, 12-bit + sign conver-
sion mode, f
= f
= 5 MHz, R
= 25
, source impedance for V
+ and V
≤
25
, fully-differential input with fixed
1.250V common-mode voltage, and 10(t
) acquisition time unless otherwise specified.
Boldface limits apply for T
A
= T
J
=
T
MIN
to T
MAX
; all other limits T
A
= T
J
= 25C. (Notes 7, 8, 9)
Symbol
Parameter
Conditions
Typical
(Note 10)
Limits
(Note 11)
Units
(Limits)
CCLK, CS, CONV, DI, PD AND SCLK INPUT CHARACTERISTICS
V
IN(1)
Logical “1” Input Voltage
V
IN(0)
Logical “0” Input Voltage
I
IN(1)
Logical “1” Input Current
I
IN(0)
Logical “0” Input Current
DO, EOC AND DOR DIGITAL OUTPUT CHARACTERISTICS
V
OUT(1)
Logical “1” Output Voltage
V
+
= 3.6V
V
+
= 3.0V
V
IN
= 3.3V
V
IN
= 0V
2.0
0.8
1.0
1.0
V (min)
V (max)
μA (max)
μA (min)
0.005
0.005
V
+
= 3.0V, I
OUT
= 360 μA
V
+
= 3.0V, I
OUT
= 10 μA
V
+
= 3.0V, I
OUT
= 1.6 mA
V
OUT
= 0V
V
OUT
= 3.3V
V
OUT
= 0V
V
OUT
= V
D
+
2.4
2.9
0.4
3.0
3.0
6.5
8.0
V (min)
V (min)
V (max)
μA (max)
μA (max)
mA (min)
mA (min)
V
OUT(0)
I
OUT
Logical “0” Output Voltage
TRI-STATE
Output Current
0.1
0.1
14
16
+I
SC
I
SC
POWER SUPPLY CHARACTERISTICS
I
D
+
Digital Supply Current
Output Short Circuit Source Current
Output Short Circuit Sink Current
Awake
CS = HIGH, Powered Down, CCLK on
CS = HIGH, Powered Down, CCLK off
Awake
CS = HIGH, Powered Down, CCLK on
CS = HIGH, Powered Down, CCLK off
Awake
CS = HIGH, Powered Down
1.1
600
12
2.2
10
0.1
70
0.1
1.5
mA (max)
μA
μA
mA (max)
μA
μA
μA
μA
I
A
+
Positive Analog Supply Current
3.0
I
REF
Reference Input Current
www.national.com
7
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| ADC12L032CIWMX | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Single-Ended Data Acquisition System |
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