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參數(shù)資料
| 型號(hào)： | ADC12L032 |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 串行ADC |
| 英文描述： | 3.3V Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold(可自行校對(duì)3.3V12位串行輸入/輸出帶MUX，采樣/保持功能A/D轉(zhuǎn)換器) |
| 中文描述： | 3.3自校準(zhǔn)12位帶符號(hào)串行I /辦公自動(dòng)化/ D轉(zhuǎn)換器MUX和采樣/保持（可自行校對(duì)3.3V12位串行輸入/輸出帶復(fù)用，采樣/保持功能的A / D轉(zhuǎn)換器） |
| 文件頁(yè)數(shù)： | 22/36頁(yè) |
| 文件大?。?/td> | 819K |
| 代理商： | ADC12L032 |
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Tables
(Continued)
TABLE 1. Data Out Formats
(Continued)
DO Formats
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
without
Sign
16
0
0
0
0
MSB
10
9
8
7
6
5
4
3
2
1
LSB
Bits
MSB
12
MSB
10
9
8
7
6
5
4
3
2
1
LSB
First
Bits
8
MSB
6
5
4
3
2
1
LSB
Bits
16
LSB
1
2
3
4
5
6
7
8
9
10
MSB
0
0
0
0
Bits
LSB
12
LSB
1
2
3
4
5
6
7
8
9
10
MSB
First
Bits
8
LSB
1
2
3
4
5
6
MSB
Bits
X = High or Low state.
TABLE 2. ADC12L038 Multiplexer Addressing
Analog Channel Addressed
and Assignment
with A/DIN1 tied to MUXOUT1
and A/DIN2 tied to MUXOUT2
A/D Input
Polarity
Assignment
Multiplexer
Output
Channel
Assignment
MUXOUT1
CH0
CH2
CH4
CH6
CH0
CH2
CH4
CH6
CH0
CH2
CH4
CH6
CH1
CH3
CH5
CH7
Mode
MUX
Address
DI0
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
DI1
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
DI2
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
DI3 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7
L
+
H
+
L
H
L
+
H
+
L
H
L
+
H
+
L
H
L
+
H
+
L
H
COM
A/DIN1
+
+
+
+
+
+
+
+
+
+
+
+
A/DIN2
+
+
+
+
MUXOUT2
CH1
CH3
CH5
CH7
CH1
CH3
CH5
CH7
COM
COM
COM
COM
COM
COM
COM
COM
+
+
Differential
+
+
+
+
Single-Ended
+
+
TABLE 3. ADC12L034 Multiplexer Addressing
Analog Channel Addressed
and Assignment
with A/DIN1 tied to MUXOUT1
and A/DIN2 tied to MUXOUT2
CH0
CH1
CH2
+
+
+
+
+
+
A/D Input
Polarity
Assignment
Multiplexer
Output
Channel
Assignment
MUXOUT1
CH0
CH2
CH0
CH2
CH0
CH2
CH1
CH3
Mode
MUX
Address
DI0
L
L
L
L
H
H
H
H
DI1
L
L
H
H
L
L
H
H
DI2
L
H
L
H
L
H
L
H
CH3
COM
A/DIN1
+
+
+
+
+
+
A/DIN2
+
+
MUXOUT2
CH1
CH3
CH1
CH3
COM
COM
COM
COM
Differential
+
Single-Ended
+
A
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