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參數(shù)資料
| 型號： | ADC1230 |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 串行ADC |
| 英文描述： | Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold |
| 中文描述： | 自校準12位帶符號串行I /辦公自動化/ D轉(zhuǎn)換器MUX和采樣/保持 |
| 文件頁數(shù)： | 30/41頁 |
| 文件大?。?/td> | 1036K |
| 代理商： | ADC1230 |
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Application Hints
(Continued)
1.6 User Mode and Test Mode
An instruction may be issued to the ADC to put it into test
mode. Test mode is used by the manufacturer to verify com-
plete functionality of the device. During test mode CH0–CH7
become active outputs. If the device is inadvertently put into
the test mode with CS continuously low, the serial communi-
cations may be desynchronized. Synchronization may be re-
gained by cycling the power supply voltage to the device.
Cycling the power supply voltage will also set the device into
user mode. If CS is used in the serial interface, theADC may
be queried to see what mode it is in. This is done by issuing
a “read STATUS register” instruction to the ADC. When bit 9
of the status register is high, the ADC is in test mode; when
bit 9 is low the ADC, is in user mode. As an alternative to cy-
cling the power supply, an instruction sequence may be used
to return the device to user mode. This instruction sequence
must be issued to theADC using CS. The following table lists
the instructions required to return the device to user mode:
Instruction
DI Data
DI3
X
DI0
H
DI1 DI2
X
DI4 DI5
H
DI6
H
DI7
H
TEST
MODE
Reset
Test Mode
Instructions
X
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
L
L
H
H
H
H
H
L
L
H
H
USER
MODE
Power Up
Set DO with
or without
Sign
Set
Acquisition
Time
Start
a
Conversion
L
H
or
L
H
or
L
H
or
L
L
L
L
H
L
H
L
L
L
L
H
H
L
H
H
or
L
H
or
L
L
L
H
H
H
L
H
or
L
H
or
L
H
or
L
H
or
L
H
or
L
L
X = Don’t Care
After returning to user mode with the user mode instruction
the power up, data with or without sign, and acquisition time
instructions need to be resent to ensure that the ADC is in
the required state before a conversion is started.
1.7 Reading the Data Without Starting a Conversion
The data from a particular conversion may be accessed
without starting a new conversion by ensuring that the
CONV line is taken high during the I/O sequence. See the
Read Data timing diagrams. Table 6 describes the operation
of the CONV pin.
2.0 DESCRIPTION OF THE ANALOG MULTIPLEXER
For the ADC12038, the analog input multiplexer can be con-
figured with 4 differential channels or 8 single ended chan-
nels with the COM input as the zero reference or any combi-
nation thereof (see Figure 9). The difference between the
voltages on the V
REF+
and V
REF
pins determines the input
voltage span (V
). The analog input voltage range is 0 to
V
A+
. Negative digital output codes result when V
IN
>
V
IN+
.
The actual voltage at V
IN
or V
IN+
cannot go below AGND.
CH0, CH2, CH4, and CH6 can be assigned to the MUX-
OUT1 pin in the differential configuration, while CH1, CH3,
CH5, and CH7 can be assigned to the MUXOUT2 pin. In the
differential configuration, the analog inputs are paired as fol-
lows: CH0 with CH1, CH2 with CH3, CH4 with CH5 and CH6
with CH7. The A/DIN1 and A/DIN2 pins can be assigned
positive or negative polarity.
With the single-ended multiplexer configuration CH0 through
CH7 can be assigned to the MUXOUT1 pin. The COM pin is
always assigned to the MUXOUT2 pin. A/DIN1 is assigned
as the positve input; A/DIN2 is assigned as the negative in-
put. (See Figure 10).
4 Differential
Channels
DS011354-38
8 Single-Ended Channels
with COM
as Zero Reference
DS011354-39
FIGURE 9.
www.national.com
30
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