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參數(shù)資料
| 型號： | ADC12041CIMSA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | NiCd/NiMH/Lead-Acid Gas Gauge For High Discharge Rates (>10A), Pgmable Offset Error & Load Comp. 16-SOIC 0 to 70 |
| 中文描述： | 1-CH 13-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 24/28頁 |
| 文件大小： | 591K |
| 代理商： | ADC12041CIMSA |
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Analog Application Information
(Continued)
Part Number
Output Voltage
Tolerance
±
0.5%
±
0.1%
±
0.2%
±
0.1%
±
0.5%
Adjustable
Temperature
Coefficient
±
100ppm/C
±
100ppm/C
±
50ppm/C
±
50ppm/C
±
25ppm/C
±
2ppm/C
LM4041CI-Adj
LM4040AI-4.1
LM4050
LM4120
LM9140BYZ-4.1
Circuit of Figure 20
INPUT CURRENT
At the start of the acquisition window (t
) a charg-
ing current (due to capacitive switching) flows through the
analog input pins (ADCIN+ and ADCIN). The peak value of
this input current will depend on the amplitude and frequency
of the input voltage applied, the source impedance and the
ADCIN+ and ADCIN input switch ON resistance of 2500
.
For low impedance voltage sources (
<
1000
for 12 MHz
operation), the input charging current will decay to a value
that will not introduce any conversion errors before the end
of the default sample-and-hold (S/H) acquisition time
(9 clock cycles). For higher source impedances (
>
1000
for 12 MHz operation), the S/H acquisition time should be in-
creased to allow the charging current to settle within speci-
fied limits. In asynchronous mode, the acquisition time may
be increased to 15, 47 or 79 clock cycles. If different acqui-
sition times are needed, the synchronous mode can be used
to fully control the acquisition time.
INPUT BYPASS CAPACITANCE
External capacitors (0.01 μF–0.1 μF) can be connected be-
tween the ADCIN+ and ADCIN analog input pins and the
analog ground to filter any noise caused by inductive pickup
associated with long leads.
POWER SUPPLY CONSIDERATIONS
Decoupling and bypassing the power supply on a high reso-
lution ADC is an important design task. Noise spikes on the
V
+ (analog supply) or V
+ (digital supply) can cause con-
version errors. The analog comparator used in the ADC will
respond to power supply noise and will make erroneous con-
version decisions. The ADC is especially sensitive to power
supply spikes that occur during the auto-zero or linearity cali-
bration cycles.
The ADC12041 is designed to operate from a single +5V
power supply. The separate supply and ground pins for the
analog and digital portions of the circuit allow separate exter-
nal bypassing. To minimize power supply noise and ripple,
adequate bypass capacitors should be placed directly be-
tween power supply pins and their associated grounds. Both
supply pins should be connected to the same supply source.
In systems with separate analog and digital supplies, the
ADC should be powered from the analog supply. At least a
10 μF tantalum electrolytic capacitor in parallel with a 0.1 μF
monolithic ceramic capacitor is recommended for bypassing
each power supply. The key consideration for these capaci-
tors is to have low series resistance and inductance. The ca-
pacitors should be placed as close as physically possible to
the supply and ground pins with the smaller capacitor closer
to the device. The capacitors also should have the shortest
possible leads in order to minimize series lead inductance.
Surface mount chip capacitors are optimal in this respect
and should be used when possible.
When the power supply regulator is not local on the board,
adequate bypassing (a high value electrolytic capacitor)
should be placed at the power entry point. The value of the
capacitor depends on the total supply current of the circuits
on the PC board. All supply currents should be supplied by
the capacitor instead of being drawn from the external sup-
ply lines, while the external supply charges the capacitor at a
steady rate.
TheADC has two V
+ and DGND pins. It is recommended to
use a 0.1 μF plus a 10 μF capacitor between pin 21(V
D
+)
DS012441-44
*Tantalum
*
*Ceramic
FIGURE 20. Low Drift Extremely Stable Reference Circuit
A
www.national.com
24
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| ADC12041CIMSAX | 功能描述:IC ADC 12BIT 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
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| ADC12048_02 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign 216kHz 8-Channel Sampling Analog-to-Digital Converter |
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