參數(shù)資料
型號(hào)： ADC12010
廠商： National Semiconductor Corporation
英文描述： 12-Bit, 10 MSPS, 160 mW A/D Converter with Internal Sample-and-Hold
中文描述： 12位，10 MSPS的，160毫瓦的A / D轉(zhuǎn)換器，內(nèi)置采樣保持電路
文件頁(yè)數(shù)： 7/22頁(yè)
文件大?。?/td> 606K
代理商： ADC12010
AC Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V
= V
D
= +5V, V
DR
=
+3.0V, PD = 0V, V
= +2.0V, f
= 10 MHz, t
= t
= 3 ns, C
L
= 25 pF/pin.
Boldface limits apply for T
A
= T
J
= T
MIN
to
T
MAX
:
all other limits T
A
= T
J
= 25C (Notes 7, 8, 9, 12)
Symbol
Parameter
Conditions
Typical
(Note 10)
10
100
Limits
(Note 10)
15
Units
(Limits)
MHz (min)
kHz
ns (min)
ns(min)
Clock
Cycles
ns (max)
ns (max)
ns
ps rms
f
CLK
1
f
CLK
2
t
CH
t
CL
Maximum Clock Frequency
Minimum Clock Frequency
Clock High Time
Clock Low Time
30
30
t
CONV
Conversion Latency
6
t
OD
Data Output Delay after Rising
CLK Edge
Aperture Delay
Aperture Jitter
Data outputs into TRI-STATE
Mode
Data Outputs Active after
TRI-STATE
Power Down Mode Exit Cycle
V
DR
= 2.5V
V
DR
= 3.0V
11
11
1.2
2
16.8
16.8
t
AD
t
AJ
t
DIS
4
ns
t
EN
4
ns
t
PD
0.1 μF cap on pins 30, 31,32
500
ns
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2:
All voltages are measured with respect to GND = AGND = DGND = 0V, unless otherwise specified.
Note 3:
When the input voltage at any pin exceeds the power supplies (that is, V
<
AGND, or V
>
V
), the current at that pin should be limited to 25 mA. The
50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to two.
Note 4:
The absolute maximum junction temperature (T
max) for this device is 150C. The maximum allowable power dissipation is dictated by T
max, the
junction-to-ambient thermal resistance (
θ
), and the ambient temperature, (T
), and can be calculated using the formula P
MAX = (T
max - T
)/
θ
. In the 32-pin
LQFP,
θ
is 79C/W, so P
MAX = 1,582 mW at 25C and 823 mW at the maximum operating ambient temperature of 85C. Note that the power consumption of
this device under normal operation will typically be about 180 mW (160 typical power consumption + 20 mW TTL output loading). The values for maximum power
dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power
supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5:
Human body model is 100 pF capacitor discharged through a 1.5 k
resistor. Machine model is 220 pF discharged through 0
.
Note 6:
The 235C reflow temperature refers to infrared reflow. For Vapor Phase Reflow (VPR), the following Conditions apply: Maintain the temperature at the top
of the package body above 183C for a minimum 60 seconds. The temperature measured on the package body must not exceed 220C. Only one excursion above
183C is allowed per reflow cycle.
Note 7:
The inputs are protected as shown below. Input voltage magnitudes above V
A
or below GND will not damage this device, provided current is limited per
(Note 3). However, errors in theA/D conversion can occur if the input goes above V
A
or below GND by more than 100 mV.As an example, if V
A
is 4.75V, the full-scale
input voltage must be
≤
4.85V to ensure accurate conversions.
20051607
Note 8:
To guarantee accuracy, it is required that |V
A
–V
D
|
≤
100 mV and separate bypass capacitors are used at each power supply pin.
Note 9:
With the test condition for V
REF
= +2.0V (4V
P-P
differential input), the 12-bit LSB is 977 μV.
Note 10:
Typical figures are at T
A
= T
J
= 25C, and represent most likely parametric norms. Test limits are guaranteed to National’sAOQL(Average Outgoing Quality
Level).
Note 11:
Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive and negative
full-scale.
Note 12:
Timing specifications are tested at TTL logic levels, V
IL
= 0.4V for a falling edge and V
IH
= 2.4V for a rising edge.
Note 13:
Optimum performance will be obtained by keeping the reference input in the 1.8V to 2.2V range. The LM4051CIM3-ADJ (SOT-23 package) is
recommended for this application.
A
www.national.com
7
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