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參數(shù)資料
| 型號： | ADC1173 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 8-Bit, 3-Volt, 15MSPS, 33mW A/D Converter |
| 中文描述： | 8位，3伏，15MSPS，33mW的A / D轉換器 |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 466K |
| 代理商： | ADC1173 |
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
AV
DD
, DV
DD
Voltage on Any Pin
V
RT
, V
RB
CLK, OE Voltage
Digital Output Voltage
Input Current (Note 3)
Package Input Current
(Note 3)
Package Dissipation at 25C
6.5V
0.3V to 6.5V
AV
DD
to V
SS
0.05 to (AV
DD
+ 0.05V)
DV
SS
to DV
DD
±
25mA
±
50mA
(Note 4)
ESD Susceptibility (Note 5)
Human Body Model
Machine Model
Soldering Temp., Infared, 10
sec. (Note 6)
Storage Temperature
2000V
200V
300C
65C to +150C
Operating Ratings
(Notes 1, 2)
Temperature Range
AV
DD
, DV
DD
|AV
SS
-DV
SS
|
V
RT
V
RB
V
IN
Voltage Range
20C
≤
T
A
≤
+75C
+2.7V to +3.6V
0V to 100 mV
1.0V to AV
DD
0V to 2.0V
V
RB
to V
RT
Converter Electrical Characteristics
The following specifications apply for AV
= DV
DD
= +3.0V
DC
, OE = 0V, V
= +2.0V, V
= 0V, C
= 20 pF, f
CLK
= 15MHz
at 50% duty cycle.
Boldface limits apply for T
A
= T
MIN
to T
MAX
;
all other limits T
A
= 25C (Notes 7, 8)
Symbol
Parameter
Conditions
Typical
(Note 9)
Limits
Units
DC Accuracy
INL
DNL
Integral Non Linearity
Differential Non Linearity
Missing Codes
Top Offset
Bottom Offset
Video Accuracy
DP
Differential Phase Error
DG
Differential Gain Error
Analog Input and Reference Characteristics
±
0.5
±
0.4
±
1.3
±
0.85
0
LSB( max)
LSB( max)
(max)
mV
mV
E
OT
E
OB
12
+1.0
f
in
= 3.58 MHz sine wave
f
in
= 3.58 MHz sine wave
0.5
1.5
Degree
%
V
IN
Input Range
2.0
V
RB
V
RT
V(min)
V(max)
C
IN
V
IN
Input Capacitance
V
IN
= 1.5V + 0.7Vrms
(CLK
LOW)
(CLK
HIGH)
4
pF
11
R
IN
BW
R
RT
Input Resistance
Analog Input Bandwidth
Top Reference Resistor
>
1
120
360
300
M
MHz
(min)
(max)
mA
R
REF
Reference Ladder
Resistance
V
RT
to V
RB
200
400
R
RB
Bottom Reference Resistor
90
I
REF
Reference Ladder Current
V
RT
=V
RTS
, V
RB
=V
RBS
4.2
V
RT
=V
RTS
,V
RB
=AV
SS
4.8
mA
V
RT
Reference Top Self Bias
Voltage
V
RT
connected to V
RTS
V
RB
connected to V
RBS
V
RT
connected to V
RTS
V
RB
connected to V
RBS
V
RT
connected to V
RTS
,
V
RB
connected to V
RBS
V
RT
connected to V
RTS
,
V
RB
connected to V
SS
1.56
1.45
1.65
0.32
0.40
1.1
1.3
V(min)
V(max)
V(min)
V(max)
μAmin
μAmax
V
RB
Reference Bottom Self Bias
Voltage
0.36
V
RTS
-
V
RBS
Self Bias Voltage Delta
1.2
1.38
V
www.national.com
4
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