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參數(shù)資料
| 型號： | ADC1113S125HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Single 11 bits ADC; 125Msps; serial JESD204A |
| 封裝： | ADC1113S125HN/C1<SOT1152-1 (HVQFN32R)|<<http://www.nxp.com/packages/SOT1152-1.html<1<Always Pb-free,;ADC1113S125HN/C1<SOT1152-1 (HVQFN32R)|<<http://www.nxp.com/packages/S |
| 文件頁數(shù)： | 13/38頁 |
| 文件大?。?/td> | 648K |
| 代理商： | ADC1113S125HN |
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ADC1113S125
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 15 March 2011
20 of 38
NXP Semiconductors
ADC1113S125
Single 11-bit ADC; serial JESD204A interface
11.5 JESD204A serializer
For more information about the JESD204A standard refer to the JEDEC web site.
11.5.1 Digital JESD204A formatter
The block placed after the ADC core is used to implement all functions of the JESD204A
standard. This ensures signal integrity and guarantees the clock and the data recovery at
the receiver side.
The block is highly parameterized and can be configured in various ways depending on
the sampling frequency and the number of lanes used.
Fig 20. CML output connection to the receiver (AC-coupled)
CMLP
CMLN
12 mA to 26 mA
100 Ω
50 Ω
10 nF
005aaa187
VDDD
-
+
RECEIVER
Fig 21. General overview of the JESD204A serializer
FRAME
TO
OCTETS
F octets
SCRAMBLER
TX transport layer
CF: position of controls bits
HD: frame boundary break
Padding with Tails bits (TT)
M
× (N' × S) bits
L
× (F) octets
L octets
N' = N + CS
S samples per frame cycle
N bits from Cr0 +
CS bits for control
M CONVERTERS
L LANES
TX CONTROLLER
LANE 0
8-bit/
10-bit
SER
ALIGNMENT
CHARACTER
GENERATOR
SYNC~
005aaa198
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| ADC1213D065HN | Dual 12-bit ADC; 65 Msps |
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| ADC1213D105HN | Dual 12-bit ADC; 105 Msps |
| ADC1213D125HN | Dual 12-bit ADC; 125 Msps |
| B1112A1-ND3G-1-50 | BNC PLUG |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC1113S125HN/C1,5 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SGL 11BT ADC 125MSPS SERIAL JESD204A RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1113S125HN/C1,551 | 制造商:NXP Semiconductors 功能描述:Bulk 制造商:NXP Semiconductors 功能描述:0 |
| ADC1113S125HN-C1 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1113S125HN-C18 | 制造商:Integrated Device Technology Inc 功能描述:HVQFN32 - Tape and Reel |
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