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參數(shù)資料
| 型號： | ADC1061 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 10-Bit High-Speed レP-Compatible A/D Converter with Track/Hold Function |
| 中文描述： | 10位高速レ的P -兼容的A / D轉(zhuǎn)換器與跟蹤/保持功能 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 320K |
| 代理商： | ADC1061 |
1.0 Modes of Operation
(Continued)
2.0 Reference Considerations
The ADC1061 has two reference inputs. These inputs,
V
and V
, are fully differential and define the zero to
full-scale range of the input signal. The reference inputs can
be connected to span the entire supply voltage range (V
= 0V, V
= V
) for ratiometric applications, or they can
be connected to different voltages (as long as they are be-
tween ground and V
) when other input spans are required.
Reducing the overall V
span to less than 5V increases
the sensitivity of the converter (e.g., if V
= 2V, then 1LSB
= 1.953 mV). Note, however, that linearity and offset errors
become larger when lower reference voltages are used. See
the Typical Performance Curves for more information. Refer-
ence voltages less than 2V are not recommended.
In most applications, V
will simply be connected to
ground, but it is often useful to have an input span that is off-
set from ground. This situation is easily accommodated by
the reference configuration used in the ADC1061. V
can
be connected to a voltage other than ground as long as the
reference for this pin is capable of sinking current. If V
is
connected to a voltage other than ground, bypass it with mul-
tiple capacitors.
Since the resistance between the two reference inputs can
be as low as 400
, the voltage source driving the reference
inputs should have low output impedance. Any noise on ei-
ther reference input is a potential cause of conversion errors,
so each of these pins must be supplied with a clean, low
noise voltage source. Each reference pin should normally be
bypassed with a 10 μF tantalum and a 0.1 μF ceramic ca-
pacitor. More bypassing may be necessary in some sys-
tems.
The choice of reference voltage source will depend on the
requirements of the system. In ratiometric data acquisition
systems with a power supply-referenced sensor, the refer-
ence inputs are normally connected to V
and GND, and
no reference other than the power supply is necessary. In
absolute measurement systems requiring 10-bit accuracy, a
reference with better than 0.1% accuracy will be necessary.
3.0 The Analog Input
The ADC1061 samples the analog input voltage once every
conversion cycle. When this happens, the input is briefly
connected to an impedance approximately equal to 600
in
series with 35 pF. Short-duration current spikes can there-
fore be observed at the analog input during normal opera-
tion. These spikes are normal and do not degrade the con-
vertor’s performance.
Note that large source impedances can slow the charging of
the sampling capacitors and degrade conversion accuracy.
Therefore, only signal sources with output impedances less
than 500
should be used if rated accuracy is to be
achieved at the minimum sample time. If the sampling time is
increased, the source impedance can be larger. If a signal
source has a high output impedance, its output should be
buffered with an operational amplifier. The operational ampli-
fier’s output should be well-behaved when driving a switched
35 pF/600
load. Any ringing or voltage shifts at the op
amp’s output during the sampling period can result in con-
version errors.
Correct conversion results will be obtained for input voltages
greater than GND 50 mV and less than V
+
+ 50 mV. Do not
allow the signal source to drive the analog input pin more
than 300 mV higher than AV
and DV
, or more than 300
mV lower than GND. If the analog input pin is forced beyond
these voltages, the current flowing through the pin should be
limited to 5 mA or less to avoid permanent damage to the
ADC1061.
4.0 Inherent Sample-and-Hold
Because the ADC1061 samples the input signal once during
each conversion, it is capable of measuring relatively fast in-
put signals without the help of an external sample-hold. In a
conventional successive-approximation A/D converter, re-
gardless of speed, the input signal must be stable
to better than
±
1
2
LSB during each conversion cycle or sig-
nificant errors will result. Consequently, even for many rela-
tively slow input signals, the signals must be externally
sampled and held constant during each conversion.
DS010559-14
FIGURE 4. Typical connection. Note the multiple bypass capacitors on the reference
and power supply pins. If V
is not grounded, it should also be bypassed to
ground using multiple capacitors (see 5.0 “Power Supply Considerations”).
www.national.com
8
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