- 您現(xiàn)在的位置：買賣IC網 > PDF目錄384089 > ADC1010S065HN (NXP Semiconductors N.V.) Single 10-bit ADC up to 65 Msps, CMOS or LVDS DDR digital outputs PDF資料下載
參數資料
| 型號： | ADC1010S065HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設及接口 |
| 英文描述： | Single 10-bit ADC up to 65 Msps, CMOS or LVDS DDR digital outputs |
| 封裝： | ADC1010S065HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618-1.html<1<Always Pb-free,;ADC1010S065HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618 |
| 文件頁數： | 32/39頁 |
| 文件大小： | 296K |
| 代理商： | ADC1010S065HN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁當前第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
ADC1010S_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 28 December 2010
32 of 39
NXP Semiconductors
ADC1010S series
Single 10-bit ADC; CMOS or LVDS DDR digital outputs
Table 24.
Default values are highlighted.
Bit
Symbol
7 to 4
-
3
DAVINV
Output clock register (address 0012h) bit description
Access
Value
0000
Description
not used
output clock data valid (DAV) polarity
normal
inverted
DAV phase select
output clock shifted (ahead) by 6/16
×
t
clk
output clock shifted (ahead) by 5/16
×
t
clk
output clock shifted (ahead) by 4/16
×
t
clk
output clock shifted (ahead) by 3/16
×
t
clk
output clock shifted (ahead) by 2/16
×
t
clk
output clock shifted (ahead) by 1/16
×
t
clk
default value as defined in timing section
output clock shifted (delayed) by 1/16
×
t
clk
R/W
0
1
2 to 0
DAVPHASE[2:0]
R/W
000
001
010
011
100
101
110
111
Table 25.
Default values are highlighted.
Bit
Symbol
7 to 6
-
Offset register (address 0013h) bit description
Access
Value
00
Description
not used
5 to 0
DIG_OFFSET[5:0]
R/W
digital offset adjustment
+31 LSB
...
0
...
32 LSB
011111
...
000000
...
100000
Table 26.
Default values are highlighted.
Bit
Symbol
7 to 3
-
2 to 0
TESTPAT_SEL[2:0]
Test pattern register 1 (address 0014h) bit description
Access
Value
00000
Description
not used
digital test pattern select
off
mid scale
FS
+FS
toggle ‘1111..1111’/’0000..0000’
custom test pattern
‘1010..1010.’
‘010..1010’
R/W
000
001
010
011
100
101
110
111
相關PDF資料 |
PDF描述 |
|---|---|
| ADC1010S065HN | Single 10-bit ADC up to 65 Msps, CMOS or LVDS DDR digital outputs |
| ADC1010S080HN | Single 10-bit ADC up to 80 Msps, CMOS or LVDS DDR digital outputs |
| ADC1010S105HN | Single 10-bit ADC up to 105 Msps, CMOS or LVDS DDR digital outputs |
| ADC1010S125HN | Single 10-bit ADC up to 125 Msps, CMOS or LVDS DDR digital outputs |
| ADC1010S065 | |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADC1010S065HN,518 | 功能描述:模數轉換器 - ADC 10bit 62dB 125MSPS RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1010S065HN/C1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single 10-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs |
| ADC1010S065HN/C1,5 | 功能描述:模數轉換器 - ADC 10bit 62dB 125MSPS RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1010S065HN-C1 | 制造商:Integrated Device Technology Inc 功能描述:HVQFN40 - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。